diff mbox series

[v5,2/6] arm64: dts: ti: k3-am62-main: Add McASP nodes

Message ID 20230313-mcasp_upstream-v5-2-d6844707aa8a@ti.com (mailing list archive)
State New, archived
Headers show
Series arm64: ti: Enable audio on AM62 and AM62A | expand

Commit Message

Jai Luthra March 13, 2023, 2:49 p.m. UTC
From: Jayesh Choudhary <j-choudhary@ti.com>

Add the nodes for McASP 0-2.

Use the audio-friendly 96MHz main_1_hsdivout6_clk as clock parent
instead of the default 100Mhz main_2_hsdivout8_clk source.

Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Signed-off-by: Jai Luthra <j-luthra@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 60 ++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

Comments

Andrew Davis March 13, 2023, 5:10 p.m. UTC | #1
On 3/13/23 9:49 AM, Jai Luthra wrote:
> From: Jayesh Choudhary <j-choudhary@ti.com>
> 
> Add the nodes for McASP 0-2.
> 
> Use the audio-friendly 96MHz main_1_hsdivout6_clk as clock parent
> instead of the default 100Mhz main_2_hsdivout8_clk source.
> 
> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
> Signed-off-by: Jai Luthra <j-luthra@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 60 ++++++++++++++++++++++++++++++++
>   1 file changed, 60 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> index ea683fd77d6a..4da5747987bb 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> @@ -787,4 +787,64 @@ epwm2: pwm@23020000 {
>   		clock-names = "tbclk", "fck";
>   		status = "disabled";
>   	};
> +
> +	mcasp0: mcasp@2b00000 {

I wonder if we want to switch to generic node naming here, audio-controller@..

> +		compatible = "ti,am33xx-mcasp-audio";
> +		reg = <0x00 0x02b00000 0x00 0x2000>,
> +		      <0x00 0x02b08000 0x00 0x400>;
> +		reg-names = "mpu","dat";

Space after ,

> +		interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
> +				<GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;

Align with space, indent with tab, as you did with "reg" property.

Same for McASP 1/2.

Reviewed-by: Andrew Davis <afd@ti.com>

> +		interrupt-names = "tx", "rx";
> +
> +		dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>;
> +		dma-names = "tx", "rx";
> +
> +		clocks = <&k3_clks 190 0>;
> +		clock-names = "fck";
> +		assigned-clocks = <&k3_clks 190 0>;
> +		assigned-clock-parents = <&k3_clks 190 2>;
> +		power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	mcasp1: mcasp@2b10000 {
> +		compatible = "ti,am33xx-mcasp-audio";
> +		reg = <0x00 0x02b10000 0x00 0x2000>,
> +		      <0x00 0x02b18000 0x00 0x400>;
> +		reg-names = "mpu","dat";
> +		interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
> +				<GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "tx", "rx";
> +
> +		dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>;
> +		dma-names = "tx", "rx";
> +
> +		clocks = <&k3_clks 191 0>;
> +		clock-names = "fck";
> +		assigned-clocks = <&k3_clks 191 0>;
> +		assigned-clock-parents = <&k3_clks 191 2>;
> +		power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
> +
> +	mcasp2: mcasp@2b20000 {
> +		compatible = "ti,am33xx-mcasp-audio";
> +		reg = <0x00 0x02b20000 0x00 0x2000>,
> +		      <0x00 0x02b28000 0x00 0x400>;
> +		reg-names = "mpu","dat";
> +		interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
> +				<GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "tx", "rx";
> +
> +		dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>;
> +		dma-names = "tx", "rx";
> +
> +		clocks = <&k3_clks 192 0>;
> +		clock-names = "fck";
> +		assigned-clocks = <&k3_clks 192 0>;
> +		assigned-clock-parents = <&k3_clks 192 2>;
> +		power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
> +	};
>   };
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index ea683fd77d6a..4da5747987bb 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -787,4 +787,64 @@  epwm2: pwm@23020000 {
 		clock-names = "tbclk", "fck";
 		status = "disabled";
 	};
+
+	mcasp0: mcasp@2b00000 {
+		compatible = "ti,am33xx-mcasp-audio";
+		reg = <0x00 0x02b00000 0x00 0x2000>,
+		      <0x00 0x02b08000 0x00 0x400>;
+		reg-names = "mpu","dat";
+		interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "tx", "rx";
+
+		dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>;
+		dma-names = "tx", "rx";
+
+		clocks = <&k3_clks 190 0>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 190 0>;
+		assigned-clock-parents = <&k3_clks 190 2>;
+		power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+	};
+
+	mcasp1: mcasp@2b10000 {
+		compatible = "ti,am33xx-mcasp-audio";
+		reg = <0x00 0x02b10000 0x00 0x2000>,
+		      <0x00 0x02b18000 0x00 0x400>;
+		reg-names = "mpu","dat";
+		interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "tx", "rx";
+
+		dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>;
+		dma-names = "tx", "rx";
+
+		clocks = <&k3_clks 191 0>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 191 0>;
+		assigned-clock-parents = <&k3_clks 191 2>;
+		power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+	};
+
+	mcasp2: mcasp@2b20000 {
+		compatible = "ti,am33xx-mcasp-audio";
+		reg = <0x00 0x02b20000 0x00 0x2000>,
+		      <0x00 0x02b28000 0x00 0x400>;
+		reg-names = "mpu","dat";
+		interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "tx", "rx";
+
+		dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>;
+		dma-names = "tx", "rx";
+
+		clocks = <&k3_clks 192 0>;
+		clock-names = "fck";
+		assigned-clocks = <&k3_clks 192 0>;
+		assigned-clock-parents = <&k3_clks 192 2>;
+		power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
+		status = "disabled";
+	};
 };