Message ID | 20230313-topic-gpu_smmu_bindings-v3-4-66ab655fbfd5@linaro.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id o9-20020a05651238a900b004db48ae69cbsm18134lft.206.2023.03.13.09.47.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Mar 2023 09:47:54 -0700 (PDT) From: Konrad Dybcio <konrad.dybcio@linaro.org> Date: Mon, 13 Mar 2023 17:44:19 +0100 Subject: [PATCH v3 4/6] arm64: dts: qcom: sm8150: Add qcom,smmu-500 to Adreno SMMU MIME-Version: 1.0 Message-Id: <20230313-topic-gpu_smmu_bindings-v3-4-66ab655fbfd5@linaro.org> References: <20230313-topic-gpu_smmu_bindings-v3-0-66ab655fbfd5@linaro.org> In-Reply-To: <20230313-topic-gpu_smmu_bindings-v3-0-66ab655fbfd5@linaro.org> To: Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>, Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Konrad Dybcio <konrad.dybcio@linaro.org> X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678726067; l=837; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=KEsliZlOIcDQaV+cqniF+0sHSB9mJmRUzLY9Wt6vcmU=; b=h6sOjJYcZqDh3xbHkwfILJ6nbDmG50BUEdrbvG8Am5IIj1fWh78gsqz9DJ2DLcY6GcYMsXLNXEGA Fe31hEAZCv3F1xGn7/BD+/+PfrB8boPVfv5xp9G/h9eWGazcjxZo X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230313_094756_252664_B0310EC0 X-CRM114-Status: GOOD ( 10.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: <linux-arm-kernel.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> List-Post: <mailto:linux-arm-kernel@lists.infradead.org> List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org |
Series |
Clean up Adreno SMMU bindings
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expand
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diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 13e0ce828606..c94765302f1b 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -2249,7 +2249,8 @@ gpucc: clock-controller@2c90000 { }; adreno_smmu: iommu@2ca0000 { - compatible = "qcom,sm8150-smmu-500", "qcom,adreno-smmu", "arm,mmu-500"; + compatible = "qcom,sm8150-smmu-500", "qcom,adreno-smmu", + "qcom,smmu-500", "arm,mmu-500"; reg = <0 0x02ca0000 0 0x10000>; #iommu-cells = <2>; #global-interrupts = <1>;
Add the fallback Qualcomm SMMU500 compatible to the Adreno SMMU. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)