From patchwork Wed Mar 15 09:24:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 13175535 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C748DC61DA4 for ; Wed, 15 Mar 2023 09:25:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=zC07NqEzQRZNpEEm5LD8h7Rk8KzsJKUBmpoJ5PlSPOY=; b=rC270+dYaKjaF2 PyvnxCiRuvIB9zeuNRuqqnUbqVAHR65VW0pgrZ5xKS+0rtNW0QsWUnfQ8kPFd555kvQ2xY8uKLzDE jIvGj2PIWN9aMZJLOEQ2Uj1QJ7S9ODXtxj6ga/7tfkWb1ITBcRElQvldb/jz/3YAipgk0se0Bu5Ev JRKdtpgcxPo+b3ILKfF/4S527A+T+ilhtP166IVP0pT+YF/evy0uElcsZ/lqjoyf9pSOzDoHlnO3M DxTtCOV28XHtp9GBBhkp6T7qaihwJR12le75vzM7OwnUwzwnGTPmgTwE8iwejuMdC8k7XsLAVLSDK yG7jx3MX86zyMh6Nu8Bw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pcNMs-00CvjB-1w; Wed, 15 Mar 2023 09:24:22 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pcNMp-00Cvid-04; Wed, 15 Mar 2023 09:24:20 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32F9OD5V076003; Wed, 15 Mar 2023 04:24:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678872253; bh=kN5HfLaSDZw2gaUqS4ucdoReUGJEGmout9fy809fv6o=; h=From:To:CC:Subject:Date; b=b3BX8snHa1faIoUo8QBr+GbwARRcAahOJ9P4DV4DiwdUsJ/l7ZxJn3kw8xwcz4jrw aCg22h/UgxGCNy0RWCHo9sBSTfBY3/EROcesdcbUwoaJjnVvfAUOvir8PLFC5kTO0j QfixD2+hM7+FPgzzOdzZBWN9/q+65w0xe7UphR+Y= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32F9ODAj022902 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 15 Mar 2023 04:24:13 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 15 Mar 2023 04:24:12 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 15 Mar 2023 04:24:12 -0500 Received: from uda0492258.dhcp.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32F9O9oi071738; Wed, 15 Mar 2023 04:24:09 -0500 From: Siddharth Vadapalli To: , , , , CC: , , , , , Subject: [PATCH] dt-bindings: phy: ti: phy-gmii-sel: Add support for J784S4 CPSW9G Date: Wed, 15 Mar 2023 14:54:08 +0530 Message-ID: <20230315092408.1722114-1-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230315_022419_138502_A1C00B18 X-CRM114-Status: UNSURE ( 8.64 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The CPSW9G instance of CPSW Ethernet Switch on TI's J784S4 SoC supports additional PHY modes like QSGMII. Add a compatible for it. Enable the use of "ti,qsgmii-main-ports" property for J784S4 CPSW9G. Signed-off-by: Siddharth Vadapalli Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml b/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml index 6d46f57fa1b4..3f2c5e2a11d5 100644 --- a/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml +++ b/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml @@ -55,6 +55,7 @@ properties: - ti,am654-phy-gmii-sel - ti,j7200-cpsw5g-phy-gmii-sel - ti,j721e-cpsw9g-phy-gmii-sel + - ti,j784s4-cpsw9g-phy-gmii-sel reg: maxItems: 1 @@ -87,6 +88,7 @@ allOf: - ti,am654-phy-gmii-sel - ti,j7200-cpsw5g-phy-gmii-sel - ti,j721e-cpsw9g-phy-gmii-sel + - ti,j784s4-cpsw9g-phy-gmii-sel then: properties: '#phy-cells': @@ -113,6 +115,7 @@ allOf: contains: enum: - ti,j721e-cpsw9g-phy-gmii-sel + - ti,j784s4-cpsw9g-phy-gmii-sel then: properties: ti,qsgmii-main-ports: @@ -130,6 +133,7 @@ allOf: enum: - ti,j7200-cpsw5g-phy-gmii-sel - ti,j721e-cpsw9g-phy-gmii-sel + - ti,j784s4-cpsw9g-phy-gmii-sel then: properties: ti,qsgmii-main-ports: false