From patchwork Tue Mar 21 11:19:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 13182628 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 16AEEC74A5B for ; Tue, 21 Mar 2023 11:21:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NKM2kWFUSHLPzU5rncmUdyiEOw+9GqjP6f2F0dLWGk4=; b=1FEcHnGYSrAo4A 93pz+DaN+TbGO2uR/DbAGtDDrBfLhlu5coVooC7wfVY7OhWWmTXkpnq3Hr3HdxDUZAm/+Us1oGHMB kVnwu5FoOrDlmG70AyR91XuBP0kKMyrH3jyomSJoBgyp0MOm9z9XZglvcM7qOhZOHPe9RebAMKCoC qRkCqzXgNpQpBTskUOkk9Pr/NTKfdYl9gtoFgV3a7kNSUynEDWb8V8VyHyP4dImvGsis6FsamNOwG lbaHOoEhbKmy0dEKC5WbecOW8PjNlASZFGFvSgnL8mLVHkKJaA4k25X2e8YKp9irETAhn/ThI9ZqW mrrKo9Lxer1MF4CmPUOQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pea2i-00CAvu-1N; Tue, 21 Mar 2023 11:20:40 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pea2O-00CAoz-1F for linux-arm-kernel@lists.infradead.org; Tue, 21 Mar 2023 11:20:23 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32LBK9r2127867; Tue, 21 Mar 2023 06:20:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1679397610; bh=rg0pr5+qWnGZXVJsqCJwL2c2bXVbI+dN4RZpf6rUM8o=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=LJybZsh/aPXT7rXlUyDWAqJK+AbG9k1iCcuA71oOjbvTzhjnbj9Z0Zmq+2lmiKhxu vwj1vy2t4Xo9BuGwFvp0yfjW/hikrzo/ht0w33aM7yDXhWl8tpd0pKLNddN6rwXt4d 6T/dkntlH+VHzbg/aei4oXuViHEKLqI1zfowUvHk= Received: from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32LBK9VS091452 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 21 Mar 2023 06:20:09 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Tue, 21 Mar 2023 06:20:09 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Tue, 21 Mar 2023 06:20:09 -0500 Received: from uda0492258.dhcp.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32LBJxVo088542; Tue, 21 Mar 2023 06:20:06 -0500 From: Siddharth Vadapalli To: , , , , , CC: , , , , Subject: [PATCH net-next 2/4] net: ethernet: ti: am65-cpsw: Add support for SGMII mode Date: Tue, 21 Mar 2023 16:49:56 +0530 Message-ID: <20230321111958.2800005-3-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230321111958.2800005-1-s-vadapalli@ti.com> References: <20230321111958.2800005-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230321_042020_561050_2AD185E9 X-CRM114-Status: GOOD ( 13.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for configuring the CPSW Ethernet Switch in SGMII mode. Depending on the SoC, allow selecting SGMII mode as a supported interface, based on the compatible used. Signed-off-by: Siddharth Vadapalli --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index cba8db14e160..d2ca1f2035f4 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -76,6 +76,7 @@ #define AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2 0x31C #define AM65_CPSW_SGMII_CONTROL_REG 0x010 +#define AM65_CPSW_SGMII_MR_ADV_ABILITY_REG 0x018 #define AM65_CPSW_SGMII_CONTROL_MR_AN_ENABLE BIT(0) #define AM65_CPSW_CTL_VLAN_AWARE BIT(1) @@ -1496,9 +1497,14 @@ static void am65_cpsw_nuss_mac_config(struct phylink_config *config, unsigned in struct am65_cpsw_port *port = container_of(slave, struct am65_cpsw_port, slave); struct am65_cpsw_common *common = port->common; - if (common->pdata.extra_modes & BIT(state->interface)) + if (common->pdata.extra_modes & BIT(state->interface)) { + if (state->interface == PHY_INTERFACE_MODE_SGMII) + writel(ADVERTISE_SGMII, + port->sgmii_base + AM65_CPSW_SGMII_MR_ADV_ABILITY_REG); + writel(AM65_CPSW_SGMII_CONTROL_MR_AN_ENABLE, port->sgmii_base + AM65_CPSW_SGMII_CONTROL_REG); + } } static void am65_cpsw_nuss_mac_link_down(struct phylink_config *config, unsigned int mode, @@ -1539,6 +1545,8 @@ static void am65_cpsw_nuss_mac_link_up(struct phylink_config *config, struct phy if (speed == SPEED_1000) mac_control |= CPSW_SL_CTL_GIG; + if (interface == PHY_INTERFACE_MODE_SGMII) + mac_control |= CPSW_SL_CTL_EXT_EN; if (speed == SPEED_10 && phy_interface_mode_is_rgmii(interface)) /* Can be used with in band mode only */ mac_control |= CPSW_SL_CTL_EXT_EN; @@ -2157,6 +2165,7 @@ am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx) break; case PHY_INTERFACE_MODE_QSGMII: + case PHY_INTERFACE_MODE_SGMII: if (common->pdata.extra_modes & BIT(port->slave.phy_if)) { __set_bit(port->slave.phy_if, port->slave.phylink_config.supported_interfaces);