From patchwork Sun Mar 26 01:19:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jing Zhang X-Patchwork-Id: 13187956 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 45730C76196 for ; Sun, 26 Mar 2023 01:21:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=XhOI9zQfAFDcqRj0Onq4S1kDMlY0iLZcUhpL7s/RCGQ=; b=lA858xNmgVqtdANfSJLfH7mOYN +QXSberIjKeOTOXdFmvgWgZ510Xx/TURZrYBQK5WSKy+P/EfIiv+mZ6bzMtBe8BFKcVN6nvNSNa4M Fr7LQ7Z5+93VHm26vkIhgpywkikFBw8LVd3ZdZ+Hk98kHCVsygkF0jgij8fHv4p/dtavRhNGB/Y99 LW048po6Zrp27s9zpIuzYg3q3gn+nDszsq+oaPTLHTTimzoH0l4KRd7REcuLyDtPXgWK4PLXUaS48 PjIQYClwVLsE8+xuumew5oRxqWTsQs0w3oyl+pXQCYfPwjgJGQEGUKHJ6803kVrMa6mLiEtFeUQJ2 ZOzFzTHw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pgF3I-007lVV-28; Sun, 26 Mar 2023 01:20:08 +0000 Received: from mail-pf1-x449.google.com ([2607:f8b0:4864:20::449]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pgF38-007lSn-1K for linux-arm-kernel@lists.infradead.org; Sun, 26 Mar 2023 01:19:59 +0000 Received: by mail-pf1-x449.google.com with SMTP id m12-20020a62f20c000000b0062612a76a08so2628105pfh.2 for ; Sat, 25 Mar 2023 18:19:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; t=1679793597; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=AiMZEZjS/R3ipxVNHJJuMkHexwVTEkmCRRTtOI5qhNw=; b=KqTTT40bJR0BN34ySkmBfSuRZ9EgxGkBStd0Pv2hwquBjC03w54UHh/lcw2yxGA9C1 8eU3hwKB+diiVW8mgMrcTntSOR+XpOEvUqV9tMV4BDtXtsB9uJ/KMMwYh55Ww52lrPos eSdDHtEd+AozRtUGd43QRI7LLxHj9yggf+Ukuk3JbiXzJE5tnp0H4EZkb96/WB6oarAM dw4iQUNfDV1HDm+AlbUSKsBIuNuk6QAJkzm0+NfPV0dluSru/hEO3KMKR55YA9eXkZDH KOoaGXQ8LESI7agnkg72WRtqLxljwC6WzOrFkv33VrSt1KdPZ/QKyPemO/wpG4K3AjBJ YDUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679793597; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=AiMZEZjS/R3ipxVNHJJuMkHexwVTEkmCRRTtOI5qhNw=; b=pHRCVpQfCwARcRFYu14r3VTg/F9mZ+bdYiBxYJ7kvMP8OcS2f0erVMKB1kzIcb8HCX o3ScHpItTGk6J7Lj+J3KbYi8B0u4HPiBy7X9UvGTOtoGdUEdrVcM0YmuWtS0AkljfDd5 QAV/KZfkXj6u5mTOZYBwX0rI0xLUpDT9YhzMzaUZiR0Ov/kbmJBbYRWiREviHJimbhNh 8h+9SQGRKGA5LPZsp5bGJGlu4VYzKXbAv0P16obux5PZDxXdv78jGQEjvy2ArlKkiSKZ B7CYfR596PiHDCe9wog9j3qLWPL9nvuUsaL0nVkMpOmh1WQ//jtxIMfK4q0pcMntUqnS MwGw== X-Gm-Message-State: AAQBX9dxBM9w6SSV5lcWIBLhRe3wHqlp06vroA1kbABvwDLf5ujo3ve8 CPj1gisNBCjELIzOx7mR30bl/w5BkYn/ZYYl/w== X-Google-Smtp-Source: AKy350avbKAxOk+db38c6sX31fwyjmAlmiFXrdx0L1mTNt1HhUge0LRva3Myy/yf6APbwdmWYSewCKG/DZD9iJa/gA== X-Received: from jgzg.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1acf]) (user=jingzhangos job=sendgmr) by 2002:a17:90a:4d8a:b0:23f:6e7:f462 with SMTP id m10-20020a17090a4d8a00b0023f06e7f462mr2142071pjh.2.1679793597500; Sat, 25 Mar 2023 18:19:57 -0700 (PDT) Date: Sun, 26 Mar 2023 01:19:49 +0000 In-Reply-To: <20230326011950.405749-1-jingzhangos@google.com> Mime-Version: 1.0 References: <20230326011950.405749-1-jingzhangos@google.com> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog Message-ID: <20230326011950.405749-3-jingzhangos@google.com> Subject: [PATCH v1 2/3] KVM: arm64: Enable writable for remaining fields for ID_AA64DFR0_EL1 From: Jing Zhang To: KVM , KVMARM , ARMLinux , Marc Zyngier , Oliver Upton Cc: Will Deacon , Paolo Bonzini , James Morse , Alexandru Elisei , Suzuki K Poulose , Fuad Tabba , Reiji Watanabe , Ricardo Koller , Raghavendra Rao Ananta , Jing Zhang X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230325_181958_446627_89B0A92A X-CRM114-Status: UNSURE ( 8.18 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable writable from userspace for all remaining fields in ID_AA64DFR0_EL1, which don't need special handlings for dependency. Signed-off-by: Jing Zhang --- arch/arm64/kvm/id_regs.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/kvm/id_regs.c b/arch/arm64/kvm/id_regs.c index 64691273980b..e64152aa448b 100644 --- a/arch/arm64/kvm/id_regs.c +++ b/arch/arm64/kvm/id_regs.c @@ -626,12 +626,32 @@ static struct id_reg_desc id_reg_descs[KVM_ARM_ID_REG_NUM] = { .get_user = get_id_reg, .set_user = set_id_aa64dfr0_el1, }, .ftr_bits = { + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, + ID_AA64DFR0_EL1_DebugVer_SHIFT, ID_AA64DFR0_EL1_DebugVer_WIDTH, 0), + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, + ID_AA64DFR0_EL1_TraceVer_SHIFT, ID_AA64DFR0_EL1_TraceVer_WIDTH, 0), ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_EL1_PMUVer_SHIFT, ID_AA64DFR0_EL1_PMUVer_WIDTH, 0), ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_EL1_BRPs_SHIFT, ID_AA64DFR0_EL1_BRPs_WIDTH, 0), + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, + ID_AA64DFR0_EL1_WRPs_SHIFT, ID_AA64DFR0_EL1_WRPs_WIDTH, 0), ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_EL1_CTX_CMPs_SHIFT, ID_AA64DFR0_EL1_CTX_CMPs_WIDTH, 0), + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, + ID_AA64DFR0_EL1_PMSVer_SHIFT, ID_AA64DFR0_EL1_PMSVer_WIDTH, 0), + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, + ID_AA64DFR0_EL1_DoubleLock_SHIFT, ID_AA64DFR0_EL1_DoubleLock_WIDTH, 0), + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, + ID_AA64DFR0_EL1_TraceFilt_SHIFT, ID_AA64DFR0_EL1_TraceFilt_WIDTH, 0), + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, + ID_AA64DFR0_EL1_TraceBuffer_SHIFT, ID_AA64DFR0_EL1_TraceBuffer_WIDTH, 0), + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, + ID_AA64DFR0_EL1_MTPMU_SHIFT, ID_AA64DFR0_EL1_MTPMU_WIDTH, 0), + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, + ID_AA64DFR0_EL1_BRBE_SHIFT, ID_AA64DFR0_EL1_BRBE_WIDTH, 0), + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, + ID_AA64DFR0_EL1_HPMN0_SHIFT, ID_AA64DFR0_EL1_HPMN0_WIDTH, 0), ARM64_FTR_END, }, .init = init_id_aa64dfr0_el1, },