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Wed, 29 Mar 2023 06:19:47 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c00a:a047:206d:4722:c4fa:e845]) by smtp.gmail.com with ESMTPSA id d9-20020a170902854900b0019c90f8c831sm22949389plo.242.2023.03.29.06.19.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 06:19:46 -0700 (PDT) From: Jagan Teki To: Dave Stevenson , Maxime Ripard , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Andrzej Hajda , Neil Armstrong , Robert Foss , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Sam Ravnborg , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, Marek Vasut , linux-amarula , Jagan Teki Subject: [PATCH v7 11/12] drm/bridge: Document bridge init order with enable_next_first Date: Wed, 29 Mar 2023 18:49:28 +0530 Message-Id: <20230329131929.1328612-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230329131929.1328612-1-jagan@amarulasolutions.com> References: <20230329131929.1328612-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230329_061947_903290_153C4D1C X-CRM114-Status: GOOD ( 14.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In order to switch HS mode properly by DSI host, the DSI sink has to send the MIPI-DCS commands first before the DSI host switches to HS mode. This behavior requires a bridge init alter in @enable and @disable function calls with the help of @enable_next_first. Document the affected bridge init order with a proper explanation. Signed-off-by: Jagan Teki --- Changes for v7: - new patch drivers/gpu/drm/drm_bridge.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c index cdc2669b3512..3c6c9937537a 100644 --- a/drivers/gpu/drm/drm_bridge.c +++ b/drivers/gpu/drm/drm_bridge.c @@ -190,6 +190,21 @@ * Ultra Low Power State (ULPS) is not explicitly supported by DRM. If * implemented, it therefore needs to be handled entirely within the DSI Host * driver. + * + * DSI sink devices typically send the MIPI-DCS commands to the DSI host via + * general MIPI_DSI_DCS read and write API. The classical DSI sequence + * mentioned that the DSI host receives MIPI-DCS commands from the DSI sink + * first in order to switch HS mode properly. Once the DSI host switches to + * HS mode any MIPI-DCS commands from the DSI sink are unfunctional. + * + * DSI sink uses the @enable function to send the MIPI-DCS commands. In a + * typical DSI host, sink pipeline the @enable call chain start with the + * DSI host, and then the DSI sink which is the "wrong" order as DSI host + * @enable is called and switched to HS mode before DSI sink @enable. If + * the DSI host enables with the @enable_next_first flag then the @enable + * for the DSI sink will be called first before the @enable of the DSI host. + * This alter bridge init order makes sure that the MIPI-DCS commands send + * first and then switch to the HS mode properly by the DSI host. */ static DEFINE_MUTEX(bridge_lock);