From patchwork Thu Mar 30 03:26:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TmFuY3kgTGluICjmnpfmrKPonqIp?= X-Patchwork-Id: 13193368 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8B9E4C74A5B for ; Thu, 30 Mar 2023 03:48:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=KsPuCZdOpd/h3lDYbWw+ui4bQo3EIo3P2n3+NiZB9d8=; b=Q7oqXpMd89+des EVcW8JGB52BwxAMZz/k6rSeFD6BMroPPxalCccLWXHO4AjFRoBd6KQHo70920IqEreWzyphkIn7xp xS9VY6zevBiUoj06CHQNBNtmCuNeeYMztp+puaHyEg5I0qJwBi0zrKKrPqXuMPEvrqpESXWj7vsqp DfF7yJp/3pFZq63tAiOECz5xYYFy8NHiaEI2diJXQ6qFK7eHOKXGwOqCYUsHPlaxLuyu8ZDZhCkH/ f56z0rC19CQPt8r1uueURMWpJ3A1gD/YDYdWUcOHcGPAtED7sVDjGOWq6OSNGTGQQtXoKZ9HktpkC Oo1J1sBqD56t8NNGX1hQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1phjG8-002SBB-33; Thu, 30 Mar 2023 03:47:32 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1phjG5-002SAZ-2W; Thu, 30 Mar 2023 03:47:31 +0000 X-UUID: 9549e7d2cead11ed8687db9d93187ff1-20230329 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=8txU63jjzRypJDVX5TtyLkcA9uojIR0mdQRPVNmgVu8=; b=Nvoa6vDQfBrN4FK5621MQZcBWM/PCEPAIQa5W2UAr1iXKt7bQ4UmQY7pCPaCZql6yJuc34WCipopR/i5m5Y/oaAWj9FbJUTwCE8AEACxn4KT4e4ypS4Y0jfdEezxPud6Awjqd8OFLu39j5ql4UDH1LI1Jhmz6RhnEU44D0DWFgk=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.22,REQID:bfbe1ec4-f24f-4a8e-90cb-2a15895f72a4,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:120426c,CLOUDID:1e61cdb4-beed-4dfc-bd9c-e1b22fa6ccc4,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-UUID: 9549e7d2cead11ed8687db9d93187ff1-20230329 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1461417669; Wed, 29 Mar 2023 20:47:24 -0700 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Thu, 30 Mar 2023 11:26:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Thu, 30 Mar 2023 11:26:15 +0800 From: Nancy.Lin To: Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno CC: David Airlie , Daniel Vetter , , , , , , , , Nancy.Lin Subject: [PATCH v3 2/2] drm/mediatek: Add ovl_adaptor get format function Date: Thu, 30 Mar 2023 11:26:14 +0800 Message-ID: <20230330032614.18837-3-nancy.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230330032614.18837-1-nancy.lin@mediatek.com> References: <20230330032614.18837-1-nancy.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230329_204729_985945_057D7104 X-CRM114-Status: GOOD ( 11.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org 1. Add ovl_adaptor get_format and get_num_formats component function. The two functions are needed for getting the supported format in mtk_plane_init(). 2. Get supported format from the ovl_adaptor's rdma engine - mdp_rdma. Signed-off-by: Nancy.Lin --- drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 ++ drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 14 ++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++ 3 files changed, 18 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h index 17b169530beb..2254038519e1 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h @@ -124,6 +124,8 @@ void mtk_ovl_adaptor_start(struct device *dev); void mtk_ovl_adaptor_stop(struct device *dev); unsigned int mtk_ovl_adaptor_layer_nr(struct device *dev); struct device *mtk_ovl_adaptor_dma_dev_get(struct device *dev); +const u32 *mtk_ovl_adaptor_get_formats(struct device *dev); +size_t mtk_ovl_adaptor_get_num_formats(struct device *dev); void mtk_rdma_bypass_shadow(struct device *dev); int mtk_rdma_clk_enable(struct device *dev); diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c index 046217828ab3..c0a38f5217ee 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c @@ -297,6 +297,20 @@ void mtk_ovl_adaptor_disable_vblank(struct device *dev) mtk_ethdr_disable_vblank(ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]); } +const u32 *mtk_ovl_adaptor_get_formats(struct device *dev) +{ + struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev); + + return mtk_mdp_rdma_get_formats(ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MDP_RDMA0]); +} + +size_t mtk_ovl_adaptor_get_num_formats(struct device *dev) +{ + struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev); + + return mtk_mdp_rdma_get_num_formats(ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MDP_RDMA0]); +} + void mtk_ovl_adaptor_add_comp(struct device *dev, struct mtk_mutex *mutex) { mtk_mutex_add_comp(mutex, DDP_COMPONENT_MDP_RDMA0); diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index 1a0c4f7e352a..f114da4d36a9 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -410,6 +410,8 @@ static const struct mtk_ddp_comp_funcs ddp_ovl_adaptor = { .disconnect = mtk_ovl_adaptor_disconnect, .add = mtk_ovl_adaptor_add_comp, .remove = mtk_ovl_adaptor_remove_comp, + .get_formats = mtk_ovl_adaptor_get_formats, + .get_num_formats = mtk_ovl_adaptor_get_num_formats, }; static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {