From patchwork Wed Apr 5 17:21:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jing Zhang X-Patchwork-Id: 13202313 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7A305C7619A for ; Wed, 5 Apr 2023 17:22:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=orXXmJZjo85d7EHyrbeppkSrmTczljTipeGrvgG6Zc8=; b=gwNU+mL0LZLgz9m+mL4UeSItgm k8ParWsDcnJi8Phtn+lVNhqLHszAnvPFfJ7493DQSVgXuQXmYrIK6B14ItrX2jtTSddfrUPN2MVUJ l8BliYRcR49eC0j3Dy+P9FJHE5xPMBGCVDWDx6e1kbTbcew86hxdP1aDtjE8gVZew1JIB1xKrwe9b E6OAOmr+7X2VMW+TBryNi5b5XDoZRQYlT2/e+H73vIYfqbNalqIorBDgZa8jkTybRosL6ZZdgG2hj OryjJCcf+1ol+k86xozInDF1CE0CJANJFGezZDynCgGTwHxCflIXA3dynq0b0Qg3WSAhia/cbyP76 sBaDlR7w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pk6ph-005FCf-38; Wed, 05 Apr 2023 17:22:05 +0000 Received: from mail-pj1-x1049.google.com ([2607:f8b0:4864:20::1049]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pk6pa-005F9e-06 for linux-arm-kernel@lists.infradead.org; Wed, 05 Apr 2023 17:21:59 +0000 Received: by mail-pj1-x1049.google.com with SMTP id q8-20020a17090ad38800b0023f116f305bso17545158pju.0 for ; Wed, 05 Apr 2023 10:21:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; t=1680715316; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=UvpttxDeu38t6uCXwtc4ExjJWc8qq+r7jPXfQje5vdU=; b=NzvbConKRfZmjeRYY4ZIKW7d6n/06Bcqi2jzYI0bLEaoiJmlJ4wOm3OBaRZMMQMY29 VtPMCSTH2RqjKqVLc1IOrdvK1P1aar/cEXzWCSKgK5VwaRU/nrA3OYr1g1NTFzj4GUfk T3Ge3uzp7ymc94n04CcSKcwcMum1Ogl16KCZxyo7nj85dOXg9qDhP9hB1ln0bv7HWy+h aErsiBjHczmUrUGLkJqfjbpIAIcS69dLPa/eRn5elxvQWuv5CjVdQmgAPgHPd4YO2lzE WE6cTtzWvTvEVFvWrC7UR2RlUqnsKbSmJ3F8VcMqdp8ynmpgOknsKuKeZNuc5F3jU6C7 kZug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680715316; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=UvpttxDeu38t6uCXwtc4ExjJWc8qq+r7jPXfQje5vdU=; b=og4DoqGyzfzghvBu3BnnbkYrivjHph2mbEZ0emlkElnrfNwSZ9QbGAzoBkD90Rr/lT WkiqbkoeooNGzThPl5BwBBBR53+G3YnHy04/Hc6GhFU1WfjqGg2uEbazENFoC29DW022 7nE9DzjO6yLfBI3NVJ4Lwgg8t+cvFZ/K6VD55ETSGAa0+fXNXeBYQ+bsE0F68SNXDBvm Sng93sEo9JWGEm85E+AqdpPrjfhFKIY4yBVsLigQIOejnDfP3EFDdM6dgGlWt66BMtTo rcknbQ8UPw02CzKhW6t/OLvmisGr+9ZgQkUQbiuWbJNoTMdQzbEDIPRnD190cxYNDNcU 4i3Q== X-Gm-Message-State: AAQBX9c3KwouskdcjNLqJ6Vg6S/oMcNtBukQ0IoMqWHMp4bi5vvpwGEp /5LrlFw1TzzhNrIrKNqY3U94m9BzD9z3B/gXLA== X-Google-Smtp-Source: AKy350akcsU16jl5QYSPwfchNud01UBUPV/zdN8kiaHxCRLdIPkOCGbugdWzGITNVuofppPsBCQDKnUCU0vQzaZ5JA== X-Received: from jgzg.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1acf]) (user=jingzhangos job=sendgmr) by 2002:a05:6a00:988:b0:5e6:f9a1:e224 with SMTP id u8-20020a056a00098800b005e6f9a1e224mr3886627pfg.6.1680715315928; Wed, 05 Apr 2023 10:21:55 -0700 (PDT) Date: Wed, 5 Apr 2023 17:21:46 +0000 In-Reply-To: <20230405172146.297208-1-jingzhangos@google.com> Mime-Version: 1.0 References: <20230405172146.297208-1-jingzhangos@google.com> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog Message-ID: <20230405172146.297208-5-jingzhangos@google.com> Subject: [PATCH v3 4/4] KVM: arm64: Enable writable for ID_AA64MMFR{0, 1, 2}_EL1 From: Jing Zhang To: KVM , KVMARM , ARMLinux , Marc Zyngier , Oliver Upton Cc: Will Deacon , Paolo Bonzini , James Morse , Alexandru Elisei , Suzuki K Poulose , Fuad Tabba , Reiji Watanabe , Raghavendra Rao Ananta , Jing Zhang X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230405_102158_067162_6FB3A307 X-CRM114-Status: GOOD ( 12.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable writable from userspace for ID_AA64MMFR{0, 1, 2}_EL1. Added a macro for defining general writable idregs. Signed-off-by: Jing Zhang --- arch/arm64/kvm/id_regs.c | 36 ++++++++++++++++++++++++++++++------ 1 file changed, 30 insertions(+), 6 deletions(-) diff --git a/arch/arm64/kvm/id_regs.c b/arch/arm64/kvm/id_regs.c index 20d1a2d2a0cc..29e344d3c8be 100644 --- a/arch/arm64/kvm/id_regs.c +++ b/arch/arm64/kvm/id_regs.c @@ -164,9 +164,6 @@ u64 kvm_arm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id) val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon), pmuver_to_perfmon(vcpu_pmuver(vcpu))); break; - case SYS_ID_AA64MMFR2_EL1: - val &= ~ID_AA64MMFR2_EL1_CCIDX_MASK; - break; case SYS_ID_MMFR4_EL1: val &= ~ARM64_FEATURE_MASK(ID_MMFR4_EL1_CCIDX); break; @@ -488,6 +485,18 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu, return 0; } +static u64 read_sanitised_id_aa64mmfr2_el1(struct kvm_vcpu *vcpu, + const struct sys_reg_desc *rd) +{ + u64 val; + u32 id = reg_to_encoding(rd); + + val = read_sanitised_ftr_reg(id); + val &= ~ID_AA64MMFR2_EL1_CCIDX_MASK; + + return val; +} + /* * Since reset() callback and field val are not used for idregs, they will be * used for specific purposes for idregs. @@ -510,6 +519,16 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu, .val = 0, \ } +#define ID_SANITISED_WRITABLE(name) { \ + SYS_DESC(SYS_##name), \ + .access = access_id_reg, \ + .get_user = get_id_reg, \ + .set_user = set_id_reg, \ + .visibility = id_visibility, \ + .reset = general_read_kvm_sanitised_reg,\ + .val = GENMASK(63, 0), \ +} + /* sys_reg_desc initialiser for known cpufeature ID registers */ #define AA32_ID_SANITISED(name) { \ SYS_DESC(SYS_##name), \ @@ -636,9 +655,14 @@ const struct sys_reg_desc id_reg_descs[KVM_ARM_ID_REG_NUM] = { ID_UNALLOCATED(6, 7), /* CRm=7 */ - ID_SANITISED(ID_AA64MMFR0_EL1), - ID_SANITISED(ID_AA64MMFR1_EL1), - ID_SANITISED(ID_AA64MMFR2_EL1), + ID_SANITISED_WRITABLE(ID_AA64MMFR0_EL1), + ID_SANITISED_WRITABLE(ID_AA64MMFR1_EL1), + { SYS_DESC(SYS_ID_AA64MMFR2_EL1), + .access = access_id_reg, + .get_user = get_id_reg, + .set_user = set_id_reg, + .reset = read_sanitised_id_aa64mmfr2_el1, + .val = GENMASK(63, 0), }, ID_UNALLOCATED(7, 3), ID_UNALLOCATED(7, 4), ID_UNALLOCATED(7, 5),