| Message ID | 20230412100949.850513-2-b-kapoor@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: ti: k3-j784s4: Add support for ADC nodes | expand |
On 4/12/2023 3:39 PM, Bhavya Kapoor wrote: > J784S4 has two instances of 8 channel ADCs in MCU domain. Add support > for both ADC nodes. > > Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> > --- > .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 40 +++++++++++++++++++ > 1 file changed, 40 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > index f04fcb614cbe..cb5ba5e94ec7 100644 > --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > @@ -342,4 +342,44 @@ cpts@3d000 { > ti,cpts-periodic-outputs = <2>; > }; > }; > + > + tscadc0: tscadc@40200000 { > + compatible = "ti,am3359-tscadc"; > + reg = <0x00 0x40200000 0x00 0x1000>; > + interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>; > + power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 0 0>; > + assigned-clocks = <&k3_clks 0 2>; > + assigned-clock-rates = <60000000>; > + clock-names = "fck"; > + dmas = <&main_udmap 0x7400>, > + <&main_udmap 0x7401>; Please fix alignment issue: dmas = <&main_udmap 0x7400>, <&main_udmap 0x7401>; > + dma-names = "fifo0", "fifo1"; > + status = "disabled"; > + > + adc { > + #io-channel-cells = <1>; > + compatible = "ti,am3359-adc"; Excessive indentation > + }; > + }; > + > + tscadc1: tscadc@40210000 { > + compatible = "ti,am3359-tscadc"; > + reg = <0x00 0x40210000 0x00 0x1000>; > + interrupts = <GIC_SPI 861 IRQ_TYPE_LEVEL_HIGH>; > + power-domains = <&k3_pds 1 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 1 0>; > + assigned-clocks = <&k3_clks 1 2>; > + assigned-clock-rates = <60000000>; > + clock-names = "fck"; > + dmas = <&main_udmap 0x7402>, > + <&main_udmap 0x7403>; ditto > + dma-names = "fifo0", "fifo1"; > + status = "disabled"; > + > + adc { > + #io-channel-cells = <1>; > + compatible = "ti,am3359-adc"; Same here > + }; > + }; > };
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index f04fcb614cbe..cb5ba5e94ec7 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -342,4 +342,44 @@ cpts@3d000 { ti,cpts-periodic-outputs = <2>; }; }; + + tscadc0: tscadc@40200000 { + compatible = "ti,am3359-tscadc"; + reg = <0x00 0x40200000 0x00 0x1000>; + interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 0 0>; + assigned-clocks = <&k3_clks 0 2>; + assigned-clock-rates = <60000000>; + clock-names = "fck"; + dmas = <&main_udmap 0x7400>, + <&main_udmap 0x7401>; + dma-names = "fifo0", "fifo1"; + status = "disabled"; + + adc { + #io-channel-cells = <1>; + compatible = "ti,am3359-adc"; + }; + }; + + tscadc1: tscadc@40210000 { + compatible = "ti,am3359-tscadc"; + reg = <0x00 0x40210000 0x00 0x1000>; + interrupts = <GIC_SPI 861 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&k3_pds 1 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 1 0>; + assigned-clocks = <&k3_clks 1 2>; + assigned-clock-rates = <60000000>; + clock-names = "fck"; + dmas = <&main_udmap 0x7402>, + <&main_udmap 0x7403>; + dma-names = "fifo0", "fifo1"; + status = "disabled"; + + adc { + #io-channel-cells = <1>; + compatible = "ti,am3359-adc"; + }; + }; };
J784S4 has two instances of 8 channel ADCs in MCU domain. Add support for both ADC nodes. Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com> --- .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+)