From patchwork Wed Apr 19 07:38:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xianwei Zhao X-Patchwork-Id: 13216472 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 72DBAC6FD18 for ; Wed, 19 Apr 2023 07:39:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tZ+FtcTCLVsq1fWcv6kd7JOqSRbv0zgG3Bxg/qElII0=; b=uRPvFWzI/8btNT fV6kzoLX4PH+0Z9kZ1/x42sq7+xkW9gw15CyHW2mqJ3BuB4MQrmOsNOB1fV8L9rF1dESXgMy7Z3zI OaKo08N5FPrq3gV6BvknWfVh8EmGg3oY7yoLDZxRwm/pUiraPqJFNL35UYFEN/P3g+6vdtodYaZqX RrVYySO1G+uXK+ptKbCEJtXJvkGj8lZZHUlCt/6MtQYYHvlskXEbYIeVOX8qewHqvJDEjxK6TuLex EofKxybsM9HqPTW05yzgl9elGxMVM45GUWVIk2BE36XnUGSimoaYvaUv4XyhQDJzSSoz9Cg1OCM5G r5fXUs5hNUTfLqJj9Muw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pp2P4-004RCO-0V; Wed, 19 Apr 2023 07:38:58 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pp2Ox-004R7b-0B; Wed, 19 Apr 2023 07:38:52 +0000 Received: from droid01-cd.amlogic.com (10.98.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Wed, 19 Apr 2023 15:40:00 +0800 From: =Xianwei Zhao To: , , , CC: Catalin Marinas , Will Deacon , Neil Armstrong , Kevin Hilman , Rob Herring , Krzysztof Kozlowski , Xianwei Zhao Subject: [RFC PATCH 2/2] arm64: dts: add support for C3 based Amlogic AW409 Date: Wed, 19 Apr 2023 15:38:34 +0800 Message-ID: <20230419073834.972273-3-xianwei.zhao@amlogic.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20230419073834.972273-1-xianwei.zhao@amlogic.com> References: <20230419073834.972273-1-xianwei.zhao@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.98.11.200] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230419_003851_095750_89D999F6 X-CRM114-Status: GOOD ( 13.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Xianwei Zhao Amlogic C3 is an advanced edge AI processor designed for smart IP camera applications. Add basic support for the C3 based Amlogic AW409 board, which describes the following components: CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Xianwei Zhao --- arch/arm64/boot/dts/amlogic/Makefile | 1 + .../amlogic/amlogic-c3-c302x-aw409-256m.dts | 30 +++++++ arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 87 +++++++++++++++++++ 3 files changed, 118 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409-256m.dts create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index cd1c5b04890a..d2b5d0d750bc 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -74,3 +74,4 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air-gbit.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb +dtb-$(CONFIG_ARCH_AMLIPC) += amlogic-c3-c302x-aw409-256m.dtb diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409-256m.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409-256m.dts new file mode 100644 index 000000000000..38ca98a32181 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409-256m.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "amlogic-c3.dtsi" + +/ { + model = "Amlogic C302 aw409 Development Board"; + compatible = "amlogic,aw409", "amlogic,c3"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart_B; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x10000000>; + }; + +}; + +&uart_B { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi new file mode 100644 index 000000000000..c69072ac57f5 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Amlogic, Inc. All rights reserved. + */ + +#include +#include +#include + +/ { + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a35"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a35"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@fff01000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x0 0xfff01000 0 0x1000>, + <0x0 0xfff02000 0 0x2000>, + <0x0 0xfff04000 0 0x2000>, + <0x0 0xfff06000 0 0x2000>; + interrupts = ; + }; + + apb4: apb4@fe000000 { + compatible = "simple-bus"; + reg = <0x0 0xfe000000 0x0 0x480000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; + + uart_B: serial@7a000 { + compatible = "amlogic,meson-g12a-uart"; + reg = <0x0 0x7a000 0x0 0x18>; + interrupts = ; + status = "disabled"; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + }; + + }; + }; +};