| Message ID | 20230420094433.42794-4-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MT8195 Acer Tomato - devicetrees Part 3 | expand |
On Thu, Apr 20, 2023 at 5:45 PM AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> wrote: > > Add the required nodes to enable the DisplayPort interface, connected > to the Embedded DisplayPort port, where we have an internal display. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > .../boot/dts/mediatek/mt8195-cherry.dtsi | 32 +++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi > index 918380697a9a..46f1c8091498 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi > @@ -49,6 +49,18 @@ memory@40000000 { > reg = <0 0x40000000 0 0x80000000>; > }; > > + pp3300_disp_x: regulator-pp3300-disp-x { > + compatible = "regulator-fixed"; > + regulator-name = "pp3300_disp_x"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; From the schematics: vin-supply = <&pp3300_z2>; Also, this is an RT9742. The datasheet says the typical enable time is 2.1ms. For a bit of margin, I'd say we could model it as 2.5ms? So: regulator-enable-ramp-delay = <2500>; ChenYu > + enable-active-high; > + gpio = <&pio 55 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&panel_fixed_pins>; > + regulator-always-on; > + }; > + > /* system wide LDO 3.3V power rail */ > pp3300_z5: regulator-pp3300-ldo-z5 { > compatible = "regulator-fixed"; > @@ -290,6 +302,20 @@ port@1 { > reg = <1>; > edp_out: endpoint { > data-lanes = <0 1 2 3>; > + remote-endpoint = <&panel_in>; > + }; > + }; > + }; > + > + aux-bus { > + panel { > + compatible = "edp-panel"; > + power-supply = <&pp3300_disp_x>; > + backlight = <&backlight_lcd0>; > + port { > + panel_in: endpoint { > + remote-endpoint = <&edp_out>; > + }; > }; > }; > }; > @@ -929,6 +955,12 @@ pins-cs { > }; > }; > > + panel_fixed_pins: panel-pwr-default-pins { > + pins-vreg-en { > + pinmux = <PINMUX_GPIO55__FUNC_GPIO55>; > + }; > + }; > + > pio_default: pio-default-pins { > pins-wifi-enable { > pinmux = <PINMUX_GPIO58__FUNC_GPIO58>; > -- > 2.40.0 > >
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 918380697a9a..46f1c8091498 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -49,6 +49,18 @@ memory@40000000 { reg = <0 0x40000000 0 0x80000000>; }; + pp3300_disp_x: regulator-pp3300-disp-x { + compatible = "regulator-fixed"; + regulator-name = "pp3300_disp_x"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpio = <&pio 55 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&panel_fixed_pins>; + regulator-always-on; + }; + /* system wide LDO 3.3V power rail */ pp3300_z5: regulator-pp3300-ldo-z5 { compatible = "regulator-fixed"; @@ -290,6 +302,20 @@ port@1 { reg = <1>; edp_out: endpoint { data-lanes = <0 1 2 3>; + remote-endpoint = <&panel_in>; + }; + }; + }; + + aux-bus { + panel { + compatible = "edp-panel"; + power-supply = <&pp3300_disp_x>; + backlight = <&backlight_lcd0>; + port { + panel_in: endpoint { + remote-endpoint = <&edp_out>; + }; }; }; }; @@ -929,6 +955,12 @@ pins-cs { }; }; + panel_fixed_pins: panel-pwr-default-pins { + pins-vreg-en { + pinmux = <PINMUX_GPIO55__FUNC_GPIO55>; + }; + }; + pio_default: pio-default-pins { pins-wifi-enable { pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
Add the required nodes to enable the DisplayPort interface, connected to the Embedded DisplayPort port, where we have an internal display. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- .../boot/dts/mediatek/mt8195-cherry.dtsi | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+)