diff mbox series

[v3,1/2] dt-bindings: clock: Add binding documentation for TI Audio REFCLK

Message ID 20230515-refclk-v3-1-37c0b550f406@ti.com (mailing list archive)
State New, archived
Headers show
Series clk: keystone: syscon-clk: Enable audio reference clock | expand

Commit Message

Jai Luthra June 15, 2023, 11:55 a.m. UTC
Add DT bindings for TI's audio reference clocks (REFCLK) present on AM62
SoC.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Jai Luthra <j-luthra@ti.com>
---
 .../bindings/clock/ti,am62-audio-refclk.yaml       | 43 ++++++++++++++++++++++
 1 file changed, 43 insertions(+)

Comments

Stephen Boyd June 16, 2023, 7:16 p.m. UTC | #1
Quoting Jai Luthra (2023-06-15 04:55:35)
> Add DT bindings for TI's audio reference clocks (REFCLK) present on AM62
> SoC.
> 
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Jai Luthra <j-luthra@ti.com>
> ---

Applied to clk-next
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/ti,am62-audio-refclk.yaml b/Documentation/devicetree/bindings/clock/ti,am62-audio-refclk.yaml
new file mode 100644
index 000000000000..b2e40bd39a3a
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/ti,am62-audio-refclk.yaml
@@ -0,0 +1,43 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/ti,am62-audio-refclk.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI Audio Reference Clock
+
+maintainers:
+  - Jai Luthra <j-luthra@ti.com>
+
+properties:
+  compatible:
+    items:
+      - const: ti,am62-audio-refclk
+
+  reg:
+    maxItems: 1
+
+  "#clock-cells":
+    const: 0
+
+  clocks:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - "#clock-cells"
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    audio_refclk0: clock@82e0 {
+        compatible = "ti,am62-audio-refclk";
+        reg = <0x82e0 0x4>;
+        clocks = <&k3_clks 157 0>;
+        assigned-clocks = <&k3_clks 157 0>;
+        assigned-clock-parents = <&k3_clks 157 8>;
+        #clock-cells = <0>;
+    };