From patchwork Tue May 16 06:22:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Achal Verma X-Patchwork-Id: 13242587 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3AE24C77B75 for ; Tue, 16 May 2023 06:22:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=jJJ8k/0Mov++/jB4JEwytWxOND24nxMwRE/lAyLoyjg=; b=rAHAC5fM0NTQMY 5fob+wS94ree/tdeQACWFcAfhuMS8psBBnkRdPSV5wN89EAX30Rec7y38Hsn7y4lKsdz/WBXCI6tR AiKB37gdwmyu4l9iHRr1xuQHR0uKfPWHy6zHmYYkkRnPTouPIGXZd5r7rbkMyfn7tU+qdDqpwztd3 l/Zzcy30bTNiEVNpF6o5FmmwArhI/FWVbvWY8b4hh6V2npv/wcJ4NWqr+pp+xNceDPPI+rdwGFpeW WXdfvNYVZKdwsQEKcrj251EtZsPD1ZH2MNOQkBTxhgVqPXeezi3KtLBshHYD7NxeN+4P943Ccq2Nv 2Jt1uZzA7psMmclYupZA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pyo4n-004VLf-03; Tue, 16 May 2023 06:22:25 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pyo4k-004VKR-1j for linux-arm-kernel@lists.infradead.org; Tue, 16 May 2023 06:22:23 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34G6MFXK039720; Tue, 16 May 2023 01:22:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684218135; bh=i7fEb4N6KWiGRKO+nezi8I99sx9V79zEmtA2DmI4a00=; h=From:To:CC:Subject:Date; b=dedb1BX2M1d6lPcgQsqImJpnqrIPVfdqeMn5y/mwJ9W7w3u1hn+bN07oTH4CuL+Rx 65f/m+ampwW44D9lCAEHmYCf200VQh9qQKkNsifCqS7g2LJta4Lp1IoWyZkLbUuZVZ zei3M0edmrkEJvSdj/9EYvokJCquWBA0iGmafNiw= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34G6MFxO020034 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 16 May 2023 01:22:15 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 16 May 2023 01:22:13 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 16 May 2023 01:22:13 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34G6MC0v039783; Tue, 16 May 2023 01:22:13 -0500 From: Achal Verma To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Achal Verma Subject: [PATCH] arm64: dts: ti: k3-j7200: correct num-lanes requested for PCIe Date: Tue, 16 May 2023 11:52:12 +0530 Message-ID: <20230516062212.2635948-1-a-verma1@ti.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230515_232222_727211_9ECE4774 X-CRM114-Status: GOOD ( 11.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Matt Ranostay J7200 has a limited 2x support for PCIe, and the properties should be updated as such. Signed-off-by: Matt Ranostay Signed-off-by: Achal Verma --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index ef352e32f19d..5e62b431d6e8 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -729,7 +729,7 @@ pcie1_rc: pcie@2910000 { device_type = "pci"; ti,syscon-pcie-ctrl = <&scm_conf 0x4074>; max-link-speed = <3>; - num-lanes = <4>; + num-lanes = <2>; power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 240 6>; clock-names = "fck"; @@ -757,7 +757,7 @@ pcie1_ep: pcie-ep@2910000 { interrupts = ; ti,syscon-pcie-ctrl = <&scm_conf 0x4074>; max-link-speed = <3>; - num-lanes = <4>; + num-lanes = <2>; power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 240 6>; clock-names = "fck";