From patchwork Wed May 17 14:35:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raphael Gallais-Pou X-Patchwork-Id: 13245126 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2C43C77B75 for ; Wed, 17 May 2023 14:36:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=VUqC5Jyi3CjJ9qIQmdyd5i60XekHoAdFP2gqtavFlvg=; b=rigmmGeIgOYyNh Je9QSYq8Wn3ztaWJ2DzFAJ9TQ2vdF9YHewXPi3UxBiQ+Dz2ltRrD0owLRcAWpjhCBigxwFFunndQc zrsAc4EccfyiapKk1HcsiOzhF5HtA/qpgQ/uDOoWTC6VSW0QEd9gI85GewpFaBk/kri05d3lGs+dO P/MKD+xo3Z6y1IVPC9Wt3TUGRj6uCD07rtYqcsTdkxVnMfR8bYKxKSKXiJmWmdttM8Wj67ElX5xX+ 5bhWI0Frq7UpjPrO+XGl1egVNTobAGNFNO8FQVykDu+pyNZ9Et+vO+3xmJ4qz3r1kTJJIywc+KiAk RLnYDHNqibzVfOVQie0w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pzIGP-00A9MJ-37; Wed, 17 May 2023 14:36:25 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pzIGA-00A9E0-2k for linux-arm-kernel@lists.infradead.org; Wed, 17 May 2023 14:36:15 +0000 Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34HEQUdp019431; Wed, 17 May 2023 16:35:50 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=d9aTm5B43JWWioWzzlRT1g++6WPBHk064sWw8VwqBx8=; b=jy/e6Cmc8xa84BHPPf6Wmv8LH74e4zRIPP5iA+socKRqiBh8fbsTWdmMO1vUAdzHZUjT q6LJNKQQQv98WaCBL4nY2/9zJqQM3UzkTerUwGPw5nMZIerc9VOxU5C+KvzovTzt/RX9 1If+zL4HletCFsWWmtBOLODalJg1R4G3BpNQE2rXlfJf2eeNdpS9nLsyUg5WfnyzAs4e AgQPyP3QhlAu9SBVe0GPizk2Ek/e88SkyFYJq7Hh15AcN5UfupeH83qgJXJNhAoJZmN5 3gWLZTB4RWU+qOqAJUeYS+WX2Skp4Z6QD14iSGDYocBvWccL8cefzzKliPcThCfAC3Tv PQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3qmtefk65v-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 17 May 2023 16:35:50 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1B7DA10002A; Wed, 17 May 2023 16:35:50 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 10B3123356C; Wed, 17 May 2023 16:35:50 +0200 (CEST) Received: from localhost (10.129.178.187) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Wed, 17 May 2023 16:35:49 +0200 From: Raphael Gallais-Pou To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Marek Vasut , Philippe Cornu , Yannick Fertre CC: , , , , , Subject: [PATCH v3 3/3] ARM: dts: stm32: fix several DT warnings on stm32mp15 Date: Wed, 17 May 2023 16:35:42 +0200 Message-ID: <20230517143542.284029-4-raphael.gallais-pou@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230517143542.284029-1-raphael.gallais-pou@foss.st.com> References: <20230517143542.284029-1-raphael.gallais-pou@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.129.178.187] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-17_02,2023-05-17_02,2023-02-09_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230517_073611_377369_6D608538 X-CRM114-Status: GOOD ( 17.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Several warnings regarding LTDC and DSI on stm32mp15* device-trees remains. Those concern: * "#size-cells" and "#address-cells" wrongly used * residual "reg" property appearing on endpoints where it could be avoided * Changed 'panel-dsi@0' to 'panel@0' according to dsi-controller.yaml Signed-off-by: Raphael Gallais-Pou --- arch/arm/boot/dts/stm32mp151.dtsi | 5 ----- arch/arm/boot/dts/stm32mp157.dtsi | 7 ------- .../dts/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts | 6 ++++-- .../boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts | 6 ++++-- .../stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts | 3 +-- arch/arm/boot/dts/stm32mp157c-dk2.dts | 8 ++++++++ arch/arm/boot/dts/stm32mp157c-ev1.dts | 10 +++++++--- arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts | 3 +-- arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi | 6 +----- arch/arm/boot/dts/stm32mp15xx-dkx.dtsi | 3 +-- 10 files changed, 27 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index a98ae58e2c1c..bf3830dca742 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -1529,11 +1529,6 @@ ltdc: display-controller@5a001000 { clock-names = "lcd"; resets = <&rcc LTDC_R>; status = "disabled"; - - port { - #address-cells = <1>; - #size-cells = <0>; - }; }; iwdg2: watchdog@5a002000 { diff --git a/arch/arm/boot/dts/stm32mp157.dtsi b/arch/arm/boot/dts/stm32mp157.dtsi index 54e73ccea446..5e733cd16ff9 100644 --- a/arch/arm/boot/dts/stm32mp157.dtsi +++ b/arch/arm/boot/dts/stm32mp157.dtsi @@ -24,14 +24,7 @@ dsi: dsi@5a000000 { clock-names = "pclk", "ref", "px_clk"; resets = <&rcc DSI_R>; reset-names = "apb"; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - }; }; }; }; diff --git a/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts b/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts index 9a2a4bc7d079..4279b26547df 100644 --- a/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts +++ b/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-ctouch2-of10.dts @@ -49,6 +49,9 @@ &dsi { phy-dsi-supply = <®18>; ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { reg = <0>; dsi_in: endpoint { @@ -104,8 +107,7 @@ <dc { status = "okay"; port { - ltdc_ep0_out: endpoint@0 { - reg = <0>; + ltdc_ep0_out: endpoint { remote-endpoint = <&dsi_in>; }; }; diff --git a/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts b/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts index 390ee8c05754..efba54289820 100644 --- a/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts +++ b/arch/arm/boot/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts @@ -49,6 +49,9 @@ &dsi { phy-dsi-supply = <®18>; ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { reg = <0>; dsi_in_ltdc: endpoint { @@ -104,8 +107,7 @@ <dc { status = "okay"; port { - ltdc_out_dsi: endpoint@0 { - reg = <0>; + ltdc_out_dsi: endpoint { remote-endpoint = <&dsi_in_ltdc>; }; }; diff --git a/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts index 0d7560ba2950..5116a7785201 100644 --- a/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts +++ b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts @@ -81,8 +81,7 @@ <dc { status = "okay"; port { - ltdc_ep0_out: endpoint@0 { - reg = <0>; + ltdc_ep0_out: endpoint { remote-endpoint = <&panel_in>; }; }; diff --git a/arch/arm/boot/dts/stm32mp157c-dk2.dts b/arch/arm/boot/dts/stm32mp157c-dk2.dts index ab13e340f4ef..4bef2300ed7c 100644 --- a/arch/arm/boot/dts/stm32mp157c-dk2.dts +++ b/arch/arm/boot/dts/stm32mp157c-dk2.dts @@ -31,10 +31,15 @@ &cryp1 { }; &dsi { + #address-cells = <1>; + #size-cells = <0>; status = "okay"; phy-dsi-supply = <®18>; ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { reg = <0>; dsi_in: endpoint { @@ -82,6 +87,9 @@ <dc { status = "okay"; port { + #address-cells = <1>; + #size-cells = <0>; + ltdc_ep1_out: endpoint@1 { reg = <1>; remote-endpoint = <&dsi_in>; diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts b/arch/arm/boot/dts/stm32mp157c-ev1.dts index ba8e9d9a42fa..49ca94c19b02 100644 --- a/arch/arm/boot/dts/stm32mp157c-ev1.dts +++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts @@ -101,9 +101,14 @@ dcmi_0: endpoint { &dsi { phy-dsi-supply = <®18>; + #address-cells = <1>; + #size-cells = <0>; status = "okay"; ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { reg = <0>; dsi_in: endpoint { @@ -119,7 +124,7 @@ dsi_out: endpoint { }; }; - panel-dsi@0 { + panel@0 { compatible = "raydium,rm68200"; reg = <0>; reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>; @@ -239,8 +244,7 @@ <dc { status = "okay"; port { - ltdc_ep0_out: endpoint@0 { - reg = <0>; + ltdc_ep0_out: endpoint { remote-endpoint = <&dsi_in>; }; }; diff --git a/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts b/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts index 407ed3952f75..eada9cf257be 100644 --- a/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts +++ b/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts @@ -161,8 +161,7 @@ <dc { status = "okay"; port { - ltdc_ep0_out: endpoint@0 { - reg = <0>; + ltdc_ep0_out: endpoint { remote-endpoint = <&panel_input>; }; }; diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi index 302efac5d26f..e1306f92fd82 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi @@ -336,11 +336,7 @@ <dc { status = "okay"; port { - #address-cells = <1>; - #size-cells = <0>; - - ltdc_ep0_out: endpoint@0 { - reg = <0>; + ltdc_ep0_out: endpoint { remote-endpoint = <&adv7513_in>; }; }; diff --git a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi index 0f1110e42c93..a6e2e20f12fa 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi @@ -457,8 +457,7 @@ <dc { status = "okay"; port { - ltdc_ep0_out: endpoint@0 { - reg = <0>; + ltdc_ep0_out: endpoint { remote-endpoint = <&sii9022_in>; }; };