| Message ID | 20230524083153.2046084-21-s.hauer@pengutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add perf support to the rockchip-dfi driver | expand |
Hi, On Wed, May 24, 2023 at 10:31:48AM +0200, Sascha Hauer wrote: > Convert the Rockchip DFI binding to yaml. > > Reviewed-by: Rob Herring <robh@kernel.org> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > --- Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> -- Sebastian > > Notes: > Changes since v4: > > - Revert to state of v3 (changes were lost in v4) > > .../bindings/devfreq/event/rockchip,dfi.yaml | 61 +++++++++++++++++++ > .../bindings/devfreq/event/rockchip-dfi.txt | 18 ------ > .../rockchip,rk3399-dmc.yaml | 2 +- > 3 files changed, 62 insertions(+), 19 deletions(-) > create mode 100644 Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml > delete mode 100644 Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt > > diff --git a/Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml b/Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml > new file mode 100644 > index 0000000000000..7a82f6ae0701e > --- /dev/null > +++ b/Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml > @@ -0,0 +1,61 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/devfreq/event/rockchip,dfi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip DFI > + > +maintainers: > + - Sascha Hauer <s.hauer@pengutronix.de> > + > +properties: > + compatible: > + enum: > + - rockchip,rk3399-dfi > + > + clocks: > + maxItems: 1 > + > + clock-names: > + items: > + - const: pclk_ddr_mon > + > + interrupts: > + maxItems: 1 > + > + reg: > + maxItems: 1 > + > + rockchip,pmu: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + Phandle to the syscon managing the "PMU general register files". > + > +required: > + - compatible > + - clocks > + - clock-names > + - interrupts > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/rk3308-cru.h> > + > + bus { > + #address-cells = <2>; > + #size-cells = <2>; > + > + dfi: dfi@ff630000 { > + compatible = "rockchip,rk3399-dfi"; > + reg = <0x00 0xff630000 0x00 0x4000>; > + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>; > + rockchip,pmu = <&pmugrf>; > + clocks = <&cru PCLK_DDR_MON>; > + clock-names = "pclk_ddr_mon"; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt b/Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt > deleted file mode 100644 > index 148191b0fc158..0000000000000 > --- a/Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt > +++ /dev/null > @@ -1,18 +0,0 @@ > - > -* Rockchip rk3399 DFI device > - > -Required properties: > -- compatible: Must be "rockchip,rk3399-dfi". > -- reg: physical base address of each DFI and length of memory mapped region > -- rockchip,pmu: phandle to the syscon managing the "pmu general register files" > -- clocks: phandles for clock specified in "clock-names" property > -- clock-names : the name of clock used by the DFI, must be "pclk_ddr_mon"; > - > -Example: > - dfi: dfi@ff630000 { > - compatible = "rockchip,rk3399-dfi"; > - reg = <0x00 0xff630000 0x00 0x4000>; > - rockchip,pmu = <&pmugrf>; > - clocks = <&cru PCLK_DDR_MON>; > - clock-names = "pclk_ddr_mon"; > - }; > diff --git a/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml b/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml > index fb4920397d08e..aba8649aaeb10 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml > +++ b/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml > @@ -18,7 +18,7 @@ properties: > $ref: /schemas/types.yaml#/definitions/phandle > description: > Node to get DDR loading. Refer to > - Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt. > + Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml. > > clocks: > maxItems: 1 > -- > 2.39.2 >
diff --git a/Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml b/Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml new file mode 100644 index 0000000000000..7a82f6ae0701e --- /dev/null +++ b/Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/devfreq/event/rockchip,dfi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip DFI + +maintainers: + - Sascha Hauer <s.hauer@pengutronix.de> + +properties: + compatible: + enum: + - rockchip,rk3399-dfi + + clocks: + maxItems: 1 + + clock-names: + items: + - const: pclk_ddr_mon + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + rockchip,pmu: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "PMU general register files". + +required: + - compatible + - clocks + - clock-names + - interrupts + - reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/rk3308-cru.h> + + bus { + #address-cells = <2>; + #size-cells = <2>; + + dfi: dfi@ff630000 { + compatible = "rockchip,rk3399-dfi"; + reg = <0x00 0xff630000 0x00 0x4000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>; + rockchip,pmu = <&pmugrf>; + clocks = <&cru PCLK_DDR_MON>; + clock-names = "pclk_ddr_mon"; + }; + }; diff --git a/Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt b/Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt deleted file mode 100644 index 148191b0fc158..0000000000000 --- a/Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt +++ /dev/null @@ -1,18 +0,0 @@ - -* Rockchip rk3399 DFI device - -Required properties: -- compatible: Must be "rockchip,rk3399-dfi". -- reg: physical base address of each DFI and length of memory mapped region -- rockchip,pmu: phandle to the syscon managing the "pmu general register files" -- clocks: phandles for clock specified in "clock-names" property -- clock-names : the name of clock used by the DFI, must be "pclk_ddr_mon"; - -Example: - dfi: dfi@ff630000 { - compatible = "rockchip,rk3399-dfi"; - reg = <0x00 0xff630000 0x00 0x4000>; - rockchip,pmu = <&pmugrf>; - clocks = <&cru PCLK_DDR_MON>; - clock-names = "pclk_ddr_mon"; - }; diff --git a/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml b/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml index fb4920397d08e..aba8649aaeb10 100644 --- a/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml @@ -18,7 +18,7 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle description: Node to get DDR loading. Refer to - Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt. + Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml. clocks: maxItems: 1