diff mbox series

arm64: dts: imx8mm-phg: Add display support

Message ID 20230530191921.1136349-1-festevam@gmail.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8mm-phg: Add display support | expand

Commit Message

Fabio Estevam May 30, 2023, 7:19 p.m. UTC 
From: Fabio Estevam <festevam@denx.de>

The imx8mm-phg has a SN65DSI83 MIPI-DSI to LVDS bridge.

Add suppor for it.

Signed-off-by: Fabio Estevam <festevam@denx.de>
---
 arch/arm64/boot/dts/freescale/imx8mm-phg.dts | 85 ++++++++++++++++++++
 1 file changed, 85 insertions(+)

Comments

Shawn Guo June 4, 2023, 1:29 p.m. UTC | #1 
On Tue, May 30, 2023 at 04:19:21PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <festevam@denx.de>
> 
> The imx8mm-phg has a SN65DSI83 MIPI-DSI to LVDS bridge.
> 
> Add suppor for it.
> 
> Signed-off-by: Fabio Estevam <festevam@denx.de>
> ---
>  arch/arm64/boot/dts/freescale/imx8mm-phg.dts | 85 ++++++++++++++++++++
>  1 file changed, 85 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phg.dts b/arch/arm64/boot/dts/freescale/imx8mm-phg.dts
> index e9447738b104..aa94bf9d40f4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-phg.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-phg.dts
> @@ -80,6 +80,35 @@ reg_usdhc2_vmmc: regulator-vmmc {
>  		startup-delay-us = <100>;
>  		off-on-delay-us = <12000>;
>  	};
> +
> +	panel {
> +		compatible = "panel-lvds";
> +		width-mm = <170>;
> +		height-mm = <28>;
> +		data-mapping = "jeida-18";
> +
> +		panel-timing {
> +			clock-frequency = <49500000>;
> +			hactive = <800>;
> +			hback-porch = <48>;
> +			hfront-porch = <312>;
> +			hsync-len = <40>;
> +			vactive = <600>;
> +			vback-porch = <19>;
> +			vfront-porch = <61>;
> +			vsync-len = <20>;
> +			hsync-active = <0>;
> +			vsync-active = <0>;
> +			de-active = <1>;
> +			pixelclk-active = <1>;
> +		};
> +
> +		port {
> +			panel_out_bridge: endpoint {
> +				remote-endpoint = <&bridge_out_panel>;
> +			};
> +		};
> +	};
>  };
>  
>  &ecspi1 {
> @@ -113,8 +142,58 @@ &i2c2 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_i2c2>;
>  	status = "okay";
> +
> +	bridge@2c {
> +		compatible = "ti,sn65dsi83";
> +		reg = <0x2c>;
> +		enable-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_dsi_bridge>;
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@0 {
> +				reg = <0>;

Missing newline.

> +				bridge_in_dsi: endpoint {
> +					remote-endpoint = <&dsi_out_bridge>;
> +					data-lanes = <1 2 3 4>;
> +				};
> +			};
> +
> +			port@2 {
> +				reg = <2>;

Here too.

Fixed them up and applied the patch.

Shawn

> +				bridge_out_panel: endpoint {
> +					remote-endpoint = <&panel_out_bridge>;
> +				};
> +			};
> +		};
> +	};
> +};
> +
> +&lcdif {
> +	status = "okay";
>  };
>  
> +&mipi_dsi {
> +	samsung,esc-clock-frequency = <10000000>;
> +	status = "okay";
> +
> +	ports {
> +		port@1 {
> +			reg = <1>;
> +
> +			dsi_out_bridge: endpoint {
> +				data-lanes = <1 2>;
> +				lane-polarities = <1 0 0 0 0>;
> +				remote-endpoint = <&bridge_in_dsi>;
> +			};
> +		};
> +	};
> +};
> +
> +
>  &uart2 {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_uart2>;
> @@ -166,6 +245,12 @@ MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0		0x19
>  		>;
>  	};
>  
> +	pinctrl_dsi_bridge: dsibridgeggrp {
> +		fsl,pins = <
> +			MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3		0x19
> +		>;
> +	};
> +
>  	pinctrl_ecspi1: ecspi1grp {
>  		fsl,pins = <
>  			MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO		0x82
> -- 
> 2.34.1
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phg.dts b/arch/arm64/boot/dts/freescale/imx8mm-phg.dts
index e9447738b104..aa94bf9d40f4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-phg.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-phg.dts
@@ -80,6 +80,35 @@  reg_usdhc2_vmmc: regulator-vmmc {
 		startup-delay-us = <100>;
 		off-on-delay-us = <12000>;
 	};
+
+	panel {
+		compatible = "panel-lvds";
+		width-mm = <170>;
+		height-mm = <28>;
+		data-mapping = "jeida-18";
+
+		panel-timing {
+			clock-frequency = <49500000>;
+			hactive = <800>;
+			hback-porch = <48>;
+			hfront-porch = <312>;
+			hsync-len = <40>;
+			vactive = <600>;
+			vback-porch = <19>;
+			vfront-porch = <61>;
+			vsync-len = <20>;
+			hsync-active = <0>;
+			vsync-active = <0>;
+			de-active = <1>;
+			pixelclk-active = <1>;
+		};
+
+		port {
+			panel_out_bridge: endpoint {
+				remote-endpoint = <&bridge_out_panel>;
+			};
+		};
+	};
 };
 
 &ecspi1 {
@@ -113,8 +142,58 @@  &i2c2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c2>;
 	status = "okay";
+
+	bridge@2c {
+		compatible = "ti,sn65dsi83";
+		reg = <0x2c>;
+		enable-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_dsi_bridge>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				bridge_in_dsi: endpoint {
+					remote-endpoint = <&dsi_out_bridge>;
+					data-lanes = <1 2 3 4>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+				bridge_out_panel: endpoint {
+					remote-endpoint = <&panel_out_bridge>;
+				};
+			};
+		};
+	};
+};
+
+&lcdif {
+	status = "okay";
 };
 
+&mipi_dsi {
+	samsung,esc-clock-frequency = <10000000>;
+	status = "okay";
+
+	ports {
+		port@1 {
+			reg = <1>;
+
+			dsi_out_bridge: endpoint {
+				data-lanes = <1 2>;
+				lane-polarities = <1 0 0 0 0>;
+				remote-endpoint = <&bridge_in_dsi>;
+			};
+		};
+	};
+};
+
+
 &uart2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart2>;
@@ -166,6 +245,12 @@  MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0		0x19
 		>;
 	};
 
+	pinctrl_dsi_bridge: dsibridgeggrp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3		0x19
+		>;
+	};
+
 	pinctrl_ecspi1: ecspi1grp {
 		fsl,pins = <
 			MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO		0x82