Message ID | 20230614065949.146187-11-anshuman.khandual@arm.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64/sysreg: Convert TRBE registers to automatic generation | expand |
On Wed, Jun 14, 2023 at 12:29:45PM +0530, Anshuman Khandual wrote: > This converts TRBBASER_EL1 register to automatic generation without > causing any functional change. Reviewed-by: Mark Brown <broonie@kernel.org>
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 6f2a0bef1db8..72765f0df4c5 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -241,14 +241,11 @@ /*** End of Statistical Profiling Extension ***/ -#define SYS_TRBBASER_EL1 sys_reg(3, 0, 9, 11, 2) #define SYS_TRBSR_EL1 sys_reg(3, 0, 9, 11, 3) #define SYS_TRBMAR_EL1 sys_reg(3, 0, 9, 11, 4) #define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6) #define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7) -#define TRBBASER_EL1_BASE_MASK GENMASK_ULL(63, 12) -#define TRBBASER_EL1_BASE_SHIFT 12 #define TRBSR_EL1_EC_MASK GENMASK(31, 26) #define TRBSR_EL1_EC_SHIFT 26 #define TRBSR_EL1_IRQ BIT(22) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index ad6da3ea1cd5..c58731f69467 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2222,3 +2222,8 @@ EndSysreg Sysreg TRBPTR_EL1 3 0 9 11 1 Field 63:0 PTR EndSysreg + +Sysreg TRBBASER_EL1 3 0 9 11 2 +Field 63:12 BASE +Res0 11:0 +EndSysreg