[v2,2/2] aarch64: enable Permission Indirection Extension

Commit Message

Joey Gouly June 16, 2023, 4 p.m. UTC

Allow lower ELs to access the registers associated with the Permission
Indirection Extension.

Signed-off-by: Joey Gouly <[e-mail]>
---
 arch/aarch64/include/asm/cpu.h |  5 +++++
 arch/aarch64/init.c            | 13 +++++++++++++
 2 files changed, 18 insertions(+)

Patch

diff --git a/arch/aarch64/include/asm/cpu.h b/arch/aarch64/include/asm/cpu.h
index 0213d53..d1f8fd9 100644
--- a/arch/aarch64/include/asm/cpu.h
+++ b/arch/aarch64/include/asm/cpu.h
@@ -55,6 +55,7 @@ 
 #define SCR_EL3_HXEn			BIT(38)
 #define SCR_EL3_EnTP2			BIT(41)
 #define SCR_EL3_TCR2EN			BIT(43)
+#define SCR_EL3_PIEN			BIT(45)
 
 #define HCR_EL2_RES1			BIT(1)
 
@@ -78,6 +79,10 @@ 
 #define ID_AA64MMFR1_EL1_HCX		BITS(43, 40)
 
 #define ID_AA64MMFR3_EL1_TCRX		BITS(4, 0)
+#define ID_AA64MMFR3_EL1_S1PIE		BITS(11, 8)
+#define ID_AA64MMFR3_EL1_S2PIE		BITS(15, 12)
+#define ID_AA64MMFR3_EL1_S1POE		BITS(19, 16)
+#define ID_AA64MMFR3_EL1_S2POE		BITS(23, 20)
 
 #define ID_AA64PFR1_EL1_MTE		BITS(11, 8)
 #define ID_AA64PFR1_EL1_SME		BITS(27, 24)
diff --git a/arch/aarch64/init.c b/arch/aarch64/init.c
index e09e050..c4e91e4 100644
--- a/arch/aarch64/init.c
+++ b/arch/aarch64/init.c
@@ -42,6 +42,16 @@  static inline bool cpu_has_pauth(void)
 	       (mrs(ID_AA64ISAR2_EL1) & isar2_pauth);
 }
 
+static inline bool cpu_has_permission_indirection(void)
+{
+	const unsigned long mask = ID_AA64MMFR3_EL1_S1PIE |
+				   ID_AA64MMFR3_EL1_S2PIE |
+				   ID_AA64MMFR3_EL1_S1POE |
+				   ID_AA64MMFR3_EL1_S2POE;
+
+	return mrs(ID_AA64MMFR3_EL1) & mask;
+}
+
 void cpu_init_el3(void)
 {
 	unsigned long scr = SCR_EL3_RES1 | SCR_EL3_NS | SCR_EL3_HCE;
@@ -70,6 +80,9 @@  void cpu_init_el3(void)
 		msr(TCR2_EL1, 0);
 	}
 
+	if (cpu_has_permission_indirection())
+		scr |= SCR_EL3_PIEN;
+
 	if (mrs_field(ID_AA64PFR1_EL1, MTE) >= 2)
 		scr |= SCR_EL3_ATA;