From patchwork Thu Jun 22 18:51:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxim Kochetkov X-Patchwork-Id: 13289538 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B5AA6EB64D8 for ; Thu, 22 Jun 2023 18:52:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=kGJwJtVdqAv7a1PLr7Zy5ttTHio7llwE5/MGa6/Jt4s=; b=Zc4ZlwbSr/EORs lJ0NxCekgWXgCdSjrG7KnNDCUNHGMqB8TGvrZuDMqtaFV88a4LA5WJW0TIEhltB16XBzOG2vof1iN ytBKyEnftWxlIlLsDH/86iJm4lbFEFNTtiZ3NflOx30v1wlq0zofAHbzC1iF8uYR0Hv6x2NPOdVQb HvJkv5UpzediXZ4Yn43B616czutzlf3wOYsCH+ibjVSqhN6id+97+855+0MoH1x9pe2Qn02bC+/hW 6Z7Qp96//ygaTDl8BmmUjq/027QxRNH0F71PwQBpowbMFO1Zyj6xYJ46umUchLMUReHya0Nd+xuXB MeW6XlZoaFIKOzQa8sWg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qCPPA-001UXI-0N; Thu, 22 Jun 2023 18:51:40 +0000 Received: from smtpng3.i.mail.ru ([94.100.177.149]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qCPP7-001UUX-0N for linux-arm-kernel@lists.infradead.org; Thu, 22 Jun 2023 18:51:38 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=inbox.ru; s=mail4; h=Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Subject:Cc:To:From:From:Subject:Content-Type:Content-Transfer-Encoding:To:Cc; bh=p+iWB5jlHu8J5NVdgbBRkf4lseuIbdgeu4gKikNjj+w=; t=1687459897;x=1687549897; b=nuLI3ZyICbdT+HSK7Odj6/du65NUK+bApNTDqHxNvjQeR7N1wf2IinwOcx9z68vQfLQuTwhIoPz/ztCR+0dEw6WQKW/xFf6PIm1kHmcqg/3vHqJIQN4kmD2VECwTV5zoNm1PExoDAUYPuAfP6BCKSfWpIS2VSADCawaeoVoN59vEfE6a3GppJrIXU0oFhev+Pk2W+kfE1ryrDhka/T8qFRKvddiFaZeBLrNwp4rCdrdoSK5VIpQWapT8NJUW0Q6teIPIwGYqBPiawUvK+wLqy30eRggEdEoT5oxYucm/zW2PGF/38jH4elGzeThW+cj8UrXqzeJ2a9PF+a+lt+udxw==; Received: by smtpng3.m.smailru.net with esmtpa (envelope-from ) id 1qCPP3-0001CL-7p; Thu, 22 Jun 2023 21:51:33 +0300 From: Maxim Kochetkov To: netdev@vger.kernel.org Cc: Maxim Kochetkov , Robert Hancock , Radhey Shyam Pandey , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Michal Simek , Andre Przywara , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/1] net: axienet: Move reset before DMA detection Date: Thu, 22 Jun 2023 21:51:30 +0300 Message-Id: <20230622185131.113717-1-fido_max@inbox.ru> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 Authentication-Results: smtpng3.m.smailru.net; auth=pass smtp.auth=fido_max@inbox.ru smtp.mailfrom=fido_max@inbox.ru X-Mailru-Src: smtp X-7564579A: 646B95376F6C166E X-77F55803: 4F1203BC0FB41BD95D99986233CC4DDCD825FF3AA070ECA3C2EE242F31DB0C21182A05F538085040F499278726E560259E7EC9ACB4612EF05270372DAF44CC04427632CD680C1B4E X-7FA49CB5: FF5795518A3D127A4AD6D5ED66289B5278DA827A17800CE7CC84CC3AD347B910EA1F7E6F0F101C67BD4B6F7A4D31EC0BCC500DACC3FED6E28638F802B75D45FF8AA50765F79006371005780D56A98C20EA1F7E6F0F101C6723150C8DA25C47586E58E00D9D99D84E1BDDB23E98D2D38BE5CCB53A13BC8DBA7860F8D68D0323F857C18BE58FF1278D20879F7C8C5043D14489FFFB0AA5F4BFA417C69337E82CC2CC7F00164DA146DAFE8445B8C89999728AA50765F790063741F7343E26298569389733CBF5DBD5E9C8A9BA7A39EFB766F5D81C698A659EA7CC7F00164DA146DA9985D098DBDEAEC8CE4AEF6198D26326F6B57BC7E6449061A352F6E88A58FB86F5D81C698A659EA7E827F84554CEF5019E625A9149C048EE9ECD01F8117BC8BEE2021AF6380DFAD18AA50765F790063735872C767BF85DA227C277FBC8AE2E8B08F9A42B2210255C75ECD9A6C639B01B4E70A05D1297E1BBCB5012B2E24CD356 X-C1DE0DAB: 0D63561A33F958A5F843997C76389857B97932DC439E4282D4C195A55BD471C6F87CCE6106E1FC07E67D4AC08A07B9B01DAA61796BF5227B9C5DF10A05D560A950611B66E3DA6D700B0A020F03D25A0997E3FB2386030E77 X-C8649E89: 1C3962B70DF3F0ADE00A9FD3E00BEEDF77DD89D51EBB7742D3581295AF09D3DF87807E0823442EA2ED31085941D9CD0AF7F820E7B07EA4CF8925DAA191E1713318F85A81DA1558E22CCEAEED2076469D72E08A9CF3BB8FE8422E0C78D0E15355B05B57073EAFDF971B30CF38DA3B874AF2E539E16A78A81621BEC6C0C71ED4F84C41F94D744909CEE921556F0E976A29E6EC0772259F8F8F8815B87D7EC76CB9 X-D57D3AED: 3ZO7eAau8CL7WIMRKs4sN3D3tLDjz0dLbV79QFUyzQ2Ujvy7cMT6pYYqY16iZVKkSc3dCLJ7zSJH7+u4VD18S7Vl4ZUrpaVfd2+vE6kuoey4m4VkSEu530nj6fImhcD4MUrOEAnl0W826KZ9Q+tr5ycPtXkTV4k65bRjmOUUP8cvGozZ33TWg5HZplvhhXbhDGzqmQDTd6OAevLeAnq3Ra9uf7zvY2zzsIhlcp/Y7m53TZgf2aB4JOg4gkr2biojB41c+mu8Ac+Sc30P1oorFA== X-Mailru-Sender: 689FA8AB762F73930F533AC2B33E986B70B89E82614EDFD7B35E749CAF57FC7598CC072019C18A892CA7F8C7C9492E1F2F5E575105D0B01ADBE2EF17B331888EEAB4BC95F72C04283CDA0F3B3F5B9367 X-Mras: Ok X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230622_115137_331957_FB30ACD4 X-CRM114-Status: GOOD ( 14.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DMA detection will fail if axienet was started before (by boot loader, boot ROM, etc). In this state axienet will not start properly. XAXIDMA_TX_CDESC_OFFSET + 4 register (MM2S_CURDESC_MSB) is used to detect 64 DMA capability here. But datasheet says: When DMACR.RS is 1 (axienet is in enabled state), CURDESC_PTR becomes Read Only (RO) and is used to fetch the first descriptor. So iowrite32()/ioread32() trick to this register to detect DMA will not work. So move axienet reset before DMA detection. Fixes: f735c40ed93c ("net: axienet: Autodetect 64-bit DMA capability") Signed-off-by: Maxim Kochetkov Reviewed-by: Robert Hancock Reviewed-by: Radhey Shyam Pandey --- drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c index 3e310b55bce2..734822321e0a 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c @@ -2042,6 +2042,11 @@ static int axienet_probe(struct platform_device *pdev) goto cleanup_clk; } + /* Reset core now that clocks are enabled, prior to accessing MDIO */ + ret = __axienet_device_reset(lp); + if (ret) + goto cleanup_clk; + /* Autodetect the need for 64-bit DMA pointers. * When the IP is configured for a bus width bigger than 32 bits, * writing the MSB registers is mandatory, even if they are all 0. @@ -2096,11 +2101,6 @@ static int axienet_probe(struct platform_device *pdev) lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD; lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC; - /* Reset core now that clocks are enabled, prior to accessing MDIO */ - ret = __axienet_device_reset(lp); - if (ret) - goto cleanup_clk; - ret = axienet_mdio_setup(lp); if (ret) dev_warn(&pdev->dev,