diff mbox series

[2/4] arm64: dts: imx8ulp: remove "fsl,imx7ulp-lpuart" compatible for i.MX8ULP

Message ID 20230625094857.29644-3-sherry.sun@nxp.com (mailing list archive)
State New, archived
Headers show
Series correct the lpuart compatible for imx8dxl/imx8ulp/imx93 | expand

Commit Message

Sherry Sun June 25, 2023, 9:48 a.m. UTC 
i.MX8ULP has specific "fsl,imx8ulp-lpuart" compatible in lpuart driver,
"fsl,imx7ulp-lpuart" compatible is no longer needed, and i.MX8ULP is not
fully compatible with i.MX7ULP, for example, i.MX8ulp can support
EOP(end-of-packet) function while i.MX7ulp doesn't, so remove
"fsl,imx7ulp-lpuart" compatible.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Krzysztof Kozlowski June 25, 2023, 10:13 a.m. UTC | #1 
On 25/06/2023 11:48, Sherry Sun wrote:
> i.MX8ULP has specific "fsl,imx8ulp-lpuart" compatible in lpuart driver,
> "fsl,imx7ulp-lpuart" compatible is no longer needed, and i.MX8ULP is not
> fully compatible with i.MX7ULP, for example, i.MX8ulp can support
> EOP(end-of-packet) function while i.MX7ulp doesn't, so remove
> "fsl,imx7ulp-lpuart" compatible.

That's not how compatibility works. Your commit msg says that new device
comes with new features, but your code says they are incompatible. These
are two different things.

Either drop the patch or provide correct rationale.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 57627bdaa851..e900f5b25694 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -245,7 +245,7 @@ 
 			};
 
 			lpuart4: serial@29390000 {
-				compatible = "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
+				compatible = "fsl,imx8ulp-lpuart";
 				reg = <0x29390000 0x1000>;
 				interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&pcc3 IMX8ULP_CLK_LPUART4>;
@@ -254,7 +254,7 @@ 
 			};
 
 			lpuart5: serial@293a0000 {
-				compatible = "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
+				compatible = "fsl,imx8ulp-lpuart";
 				reg = <0x293a0000 0x1000>;
 				interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&pcc3 IMX8ULP_CLK_LPUART5>;
@@ -334,7 +334,7 @@ 
 			};
 
 			lpuart6: serial@29860000 {
-				compatible = "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
+				compatible = "fsl,imx8ulp-lpuart";
 				reg = <0x29860000 0x1000>;
 				interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&pcc4 IMX8ULP_CLK_LPUART6>;
@@ -343,7 +343,7 @@ 
 			};
 
 			lpuart7: serial@29870000 {
-				compatible = "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
+				compatible = "fsl,imx8ulp-lpuart";
 				reg = <0x29870000 0x1000>;
 				interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&pcc4 IMX8ULP_CLK_LPUART7>;