From patchwork Mon Jul 3 09:31:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xianwei Zhao X-Patchwork-Id: 13299787 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A113CC0015E for ; Mon, 3 Jul 2023 09:32:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=y9k5/r0Bv9Mee03tTeUYIFmZHqrXOUcrcfT3nU6SyCc=; b=CYofiVb9xGsPE8 efZOWltg+5GwY1Z+w/ITvpdWEEuearhkwGyiK8V6/3ImFChUasoZgY0wPDeu6NospCivPsbIp+x/H 6nRXLUV+UuDbJ4nLQRvb8KUgZSuBp5NnvXORS7GCswx5v1tiIxWzCFo9rwH1FOEHBLJeMniwEfsmN X6gTES/2kPazNq0dncCxBHKlybzxpM4XBZrHXGravMojbYoiBOeiAaGfpm3H5JRdrUkbhb4yYAhwk Gh9lUD4cY0Ig6UI1RMzNSr2ZcY7xoKOaBlxKe3nKWyJ25sSOuJZVMZGFEPIehlvPBojtjwNmi25mO +xMrMp9j0zkFghIPDVew==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qGFuh-009wVO-1Q; Mon, 03 Jul 2023 09:32:07 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qGFue-009wSH-23; Mon, 03 Jul 2023 09:32:05 +0000 Received: from droid01-cd.amlogic.com (10.98.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Mon, 3 Jul 2023 17:32:01 +0800 From: =Xianwei Zhao To: , , , CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Neil Armstrong" , Kevin Hilman , Xianwei Zhao Subject: [PATCH 2/3] soc: c3: Add support for power domains controller Date: Mon, 3 Jul 2023 17:31:41 +0800 Message-ID: <20230703093142.2028500-3-xianwei.zhao@amlogic.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20230703093142.2028500-1-xianwei.zhao@amlogic.com> References: <20230703093142.2028500-1-xianwei.zhao@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.98.11.200] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230703_023204_675634_62F43B7F X-CRM114-Status: GOOD ( 13.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Xianwei Zhao Add support for C3 Power controller. C3 power control registers are in secure domain, and should be accessed by SMC. Signed-off-by: Xianwei Zhao --- drivers/soc/amlogic/meson-secure-pwrc.c | 28 ++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/soc/amlogic/meson-secure-pwrc.c b/drivers/soc/amlogic/meson-secure-pwrc.c index 25b4b71df9b8..39ccc8f2e630 100644 --- a/drivers/soc/amlogic/meson-secure-pwrc.c +++ b/drivers/soc/amlogic/meson-secure-pwrc.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -132,6 +133,22 @@ static struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] = { SEC_PD(S4_AUDIO, 0), }; +static struct meson_secure_pwrc_domain_desc c3_pwrc_domains[] = { + SEC_PD(C3_NNA, 0), + SEC_PD(C3_AUDIO, GENPD_FLAG_ALWAYS_ON), + SEC_PD(C3_SDIOA, GENPD_FLAG_ALWAYS_ON), + SEC_PD(C3_EMMC, GENPD_FLAG_ALWAYS_ON), + SEC_PD(C3_USB_COMB, GENPD_FLAG_ALWAYS_ON), + SEC_PD(C3_SDCARD, GENPD_FLAG_ALWAYS_ON), + SEC_PD(C3_ETH, GENPD_FLAG_ALWAYS_ON), + SEC_PD(C3_GE2D, GENPD_FLAG_ALWAYS_ON), + SEC_PD(C3_CVE, GENPD_FLAG_ALWAYS_ON), + SEC_PD(C3_GDC_WRAP, GENPD_FLAG_ALWAYS_ON), + SEC_PD(C3_ISP_TOP, GENPD_FLAG_ALWAYS_ON), + SEC_PD(C3_MIPI_ISP_WRAP, GENPD_FLAG_ALWAYS_ON), + SEC_PD(C3_VCODEC, 0), +}; + static int meson_secure_pwrc_probe(struct platform_device *pdev) { int i; @@ -179,7 +196,7 @@ static int meson_secure_pwrc_probe(struct platform_device *pdev) for (i = 0 ; i < match->count ; ++i) { struct meson_secure_pwrc_domain *dom = &pwrc->domains[i]; - if (!match->domains[i].index) + if (!match->domains[i].name) continue; dom->pwrc = pwrc; @@ -207,6 +224,11 @@ static struct meson_secure_pwrc_domain_data meson_secure_s4_pwrc_data = { .count = ARRAY_SIZE(s4_pwrc_domains), }; +static struct meson_secure_pwrc_domain_data amlogic_secure_c3_pwrc_data = { + .domains = c3_pwrc_domains, + .count = ARRAY_SIZE(c3_pwrc_domains), +}; + static const struct of_device_id meson_secure_pwrc_match_table[] = { { .compatible = "amlogic,meson-a1-pwrc", @@ -216,6 +238,10 @@ static const struct of_device_id meson_secure_pwrc_match_table[] = { .compatible = "amlogic,meson-s4-pwrc", .data = &meson_secure_s4_pwrc_data, }, + { + .compatible = "amlogic,c3-pwrc", + .data = &amlogic_secure_c3_pwrc_data, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, meson_secure_pwrc_match_table);