From patchwork Tue Jul 4 13:36:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nico Pache X-Patchwork-Id: 13301274 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EDA31EB64D9 for ; Tue, 4 Jul 2023 13:37:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=3+4vvV1fyqgzwm+mzgaAEvSBxzHvS/pnYhYDTCVgvmc=; b=bLQ+Gr0/8qnRCK aLsYAVdqiEtEWw/Sq3RZW4LhFOGSWJfrh+nGetVFbY9E/dfNPYi+GbcoxKA2JuC5gjqVMO/0fzBqS VQS2oEFWjuYf5KRjPjWdmnz9BESnKwx5lCSdZ8lg6fEX1xAtWRnk7MLC7bGb5HJRlfe4TMRKuRpUk hnwLy7ReqG3YoHcgjkDQfFPqThbkoHrDqKG6cJhNoqnUqa43ASgngdYQzmPG9mByIfNNS50P5An0J +2Fn518uoruWr/9JZkrjraqevcQDXM9Gr8pz0Q+wlCDAg1qgp4zfijs2fG+j6mQdr+nRamWBJNrN1 EqAY/UOFFVsSJDliqEYQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qGgCy-00DPgG-25; Tue, 04 Jul 2023 13:36:44 +0000 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qGgCv-00DPfF-2m for linux-arm-kernel@lists.infradead.org; Tue, 04 Jul 2023 13:36:43 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1688477798; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=+0Hn5oVX8mV+eSlfKh9QFZ/BZppPQJ7p/ZnEJuNx2iU=; b=hsZmKkM853JRWmoXfRMxb6muyiLOMuN9RU+7m8bgt3uhXOkT92LT+2RBV9X9AtoHOM3aMY gC8CsAJNoU4OVFtzHptrlil9VGVPnwroYQH/3ojdD4Xsy6k3dbZZx1AF87ewoHC9c+QYHN NrfS+2COyCktLTwfnzjv18r8JIcRTek= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-344-_vC0b2w5N2263uFTjzEPSQ-1; Tue, 04 Jul 2023 09:36:37 -0400 X-MC-Unique: _vC0b2w5N2263uFTjzEPSQ-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id DD81486F122; Tue, 4 Jul 2023 13:36:36 +0000 (UTC) Received: from localhost.localdomain.com (unknown [10.22.16.103]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9536DF641E; Tue, 4 Jul 2023 13:36:35 +0000 (UTC) From: Nico Pache To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: aquini@redhat.com, Andrew Morton , Anshuman Khandual , Catalin Marinas , David Hildenbrand , Gerald Schaefer , Liu Shixin , Will Deacon , Yu Zhao Subject: [PATCH V2] arm64: properly define SOFT_DIRTY functionality Date: Tue, 4 Jul 2023 09:36:33 -0400 Message-ID: <20230704133633.1918147-1-npache@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230704_063641_991166_3AA69A9A X-CRM114-Status: GOOD ( 23.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org ARM64 has a soft-dirty bit (software dirty) but never properly defines CONFIG_ARCH_HAS_SOFT_DIRTY or its necessary functions. This patch introduces the ability to set/clear the soft dirty bit in a similar manner as the other arches that utilize it. However, we must be careful... there are cases where the DBM bit is not available and the software dirty bit plays a essential role in determining whether or not a page is dirty. In these cases we must not allow the user to clear the software dirty bit. We can check for these cases by utilizing the arch_has_hw_pte_young() function which tests the availability of DBM. Cc: Andrew Morton Cc: Anshuman Khandual Cc: Catalin Marinas Cc: David Hildenbrand Cc: Gerald Schaefer Cc: Liu Shixin Cc: Will Deacon Cc: Yu Zhao Signed-off-by: Nico Pache --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/pgtable.h | 104 ++++++++++++++++++++++++++----- 2 files changed, 90 insertions(+), 15 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 7856c3a3e35a..6ea73b8148c5 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -173,6 +173,7 @@ config ARM64 select HAVE_ARCH_PREL32_RELOCATIONS select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET select HAVE_ARCH_SECCOMP_FILTER + select HAVE_ARCH_SOFT_DIRTY select HAVE_ARCH_STACKLEAK select HAVE_ARCH_THREAD_STRUCT_WHITELIST select HAVE_ARCH_TRACEHOOK diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 0bd18de9fd97..c4970c9ed114 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -51,6 +51,20 @@ static inline bool arch_thp_swp_supported(void) } #define arch_thp_swp_supported arch_thp_swp_supported +/* + * On arm64 without hardware Access Flag, copying from user will fail because + * the pte is old and cannot be marked young. So we always end up with zeroed + * page after fork() + CoW for pfn mappings. We don't always have a + * hardware-managed access flag on arm64. + */ +#define arch_has_hw_pte_young cpu_has_hw_af + +/* + * Experimentally, it's cheap to set the access flag in hardware and we + * benefit from prefaulting mappings as 'old' to start with. + */ +#define arch_wants_old_prefaulted_pte cpu_has_hw_af + /* * Outside of a few very special situations (e.g. hibernation), we always * use broadcast TLB invalidation instructions, therefore a spurious page @@ -121,8 +135,9 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys) }) #define pte_hw_dirty(pte) (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY)) -#define pte_sw_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY)) -#define pte_dirty(pte) (pte_sw_dirty(pte) || pte_hw_dirty(pte)) +#define pte_soft_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY)) +#define pte_dirty(pte) (pte_soft_dirty(pte) || pte_hw_dirty(pte)) +#define pte_swp_soft_dirty(pte) pte_soft_dirty(pte) #define pte_valid(pte) (!!(pte_val(pte) & PTE_VALID)) /* @@ -189,7 +204,8 @@ static inline pte_t pte_mkwrite(pte_t pte) static inline pte_t pte_mkclean(pte_t pte) { - pte = clear_pte_bit(pte, __pgprot(PTE_DIRTY)); + if (!arch_has_hw_pte_young()) + pte = clear_pte_bit(pte, __pgprot(PTE_DIRTY)); pte = set_pte_bit(pte, __pgprot(PTE_RDONLY)); return pte; @@ -1077,25 +1093,83 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, #define phys_to_ttbr(addr) (addr) #endif -/* - * On arm64 without hardware Access Flag, copying from user will fail because - * the pte is old and cannot be marked young. So we always end up with zeroed - * page after fork() + CoW for pfn mappings. We don't always have a - * hardware-managed access flag on arm64. - */ -#define arch_has_hw_pte_young cpu_has_hw_af +static inline bool pud_sect_supported(void) +{ + return PAGE_SIZE == SZ_4K; +} +#ifdef CONFIG_ARM64_HW_AFDBM /* - * Experimentally, it's cheap to set the access flag in hardware and we - * benefit from prefaulting mappings as 'old' to start with. + * if we have the DBM bit we can utilize the software dirty bit as + * a mechanism to introduce the soft_dirty functionality; however, without + * it this bit is crucial to determining if a entry is dirty and we cannot + * clear it via software. DBM can also be disabled or broken on some early + * armv8 devices, so check its availability before modifying it. */ -#define arch_wants_old_prefaulted_pte cpu_has_hw_af +static inline pte_t pte_clear_soft_dirty(pte_t pte) +{ + if (!arch_has_hw_pte_young()) + return pte; -static inline bool pud_sect_supported(void) + return clear_pte_bit(pte, __pgprot(PTE_DIRTY)); +} + +static inline pte_t pte_mksoft_dirty(pte_t pte) { - return PAGE_SIZE == SZ_4K; + if (!arch_has_hw_pte_young()) + return pte; + + return set_pte_bit(pte, __pgprot(PTE_DIRTY)); +} + +static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) +{ + if (!arch_has_hw_pte_young()) + return pte; + + return clear_pte_bit(pte, __pgprot(PTE_DIRTY)); +} + +static inline pte_t pte_swp_mksoft_dirty(pte_t pte) +{ + if (!arch_has_hw_pte_young()) + return pte; + + return set_pte_bit(pte, __pgprot(PTE_DIRTY)); +} + +static inline int pmd_soft_dirty(pmd_t pmd) +{ + return pte_soft_dirty(pmd_pte(pmd)); +} + +static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) +{ + return pte_pmd(pte_clear_soft_dirty(pmd_pte(pmd))); +} + +static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) +{ + return pte_pmd(pte_mksoft_dirty(pmd_pte(pmd))); } +#ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION +static inline int pmd_swp_soft_dirty(pmd_t pmd) +{ + return pmd_soft_dirty(pmd); +} + +static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) +{ + return pmd_clear_soft_dirty(pmd); +} + +static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) +{ + return pmd_mksoft_dirty(pmd); +} +#endif /* CONFIG_ARCH_ENABLE_THP_MIGRATION */ +#endif /* CONFIG_ARM64_HW_AFDBM */ #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION #define ptep_modify_prot_start ptep_modify_prot_start