| Message ID | 20230705172759.1610753-8-gatien.chevallier@foss.st.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce STM32 Firewall framework | expand |
Hi Gatien On 7/5/23 19:27, Gatien Chevallier wrote: > RIFSC is a firewall controller. Change its compatible so that is matches > the documentation and reference RIFSC as a feature-domain-controller. > > Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> > --- > arch/arm64/boot/dts/st/stm32mp251.dtsi | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi > index 5268a4321841..62101084cab8 100644 > --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi > +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi > @@ -106,17 +106,20 @@ soc@0 { > ranges = <0x0 0x0 0x0 0x80000000>; > > rifsc: rifsc-bus@42080000 { > - compatible = "simple-bus"; > + compatible = "st,stm32mp25-rifsc"; You could keep "simple-bus" compatible (in second position). In case of the RIFSC is not probed, the platform will be able to boot. If you agree you can use the same for ETZPC. Cheers Alex > reg = <0x42080000 0x1000>; > #address-cells = <1>; > #size-cells = <1>; > ranges; > + feature-domain-controller; > + #feature-domain-cells = <1>; > > usart2: serial@400e0000 { > compatible = "st,stm32h7-uart"; > reg = <0x400e0000 0x400>; > interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&ck_flexgen_08>; > + feature-domains = <&rifsc 32>; > status = "disabled"; > }; > };
Hi Alex, On 7/6/23 11:25, Alexandre TORGUE wrote: > Hi Gatien > > On 7/5/23 19:27, Gatien Chevallier wrote: >> RIFSC is a firewall controller. Change its compatible so that is matches >> the documentation and reference RIFSC as a feature-domain-controller. >> >> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> >> --- >> arch/arm64/boot/dts/st/stm32mp251.dtsi | 5 ++++- >> 1 file changed, 4 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi >> b/arch/arm64/boot/dts/st/stm32mp251.dtsi >> index 5268a4321841..62101084cab8 100644 >> --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi >> +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi >> @@ -106,17 +106,20 @@ soc@0 { >> ranges = <0x0 0x0 0x0 0x80000000>; >> rifsc: rifsc-bus@42080000 { >> - compatible = "simple-bus"; >> + compatible = "st,stm32mp25-rifsc"; > > You could keep "simple-bus" compatible (in second position). In case of > the RIFSC is not probed, the platform will be able to boot. If you agree > you can use the same for ETZPC. > > Cheers > Alex Sure, good point. I'll change that in V2 Best regards, Gatien > >> reg = <0x42080000 0x1000>; >> #address-cells = <1>; >> #size-cells = <1>; >> ranges; >> + feature-domain-controller; >> + #feature-domain-cells = <1>; >> usart2: serial@400e0000 { >> compatible = "st,stm32h7-uart"; >> reg = <0x400e0000 0x400>; >> interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; >> clocks = <&ck_flexgen_08>; >> + feature-domains = <&rifsc 32>; >> status = "disabled"; >> }; >> }; >
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 5268a4321841..62101084cab8 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -106,17 +106,20 @@ soc@0 { ranges = <0x0 0x0 0x0 0x80000000>; rifsc: rifsc-bus@42080000 { - compatible = "simple-bus"; + compatible = "st,stm32mp25-rifsc"; reg = <0x42080000 0x1000>; #address-cells = <1>; #size-cells = <1>; ranges; + feature-domain-controller; + #feature-domain-cells = <1>; usart2: serial@400e0000 { compatible = "st,stm32h7-uart"; reg = <0x400e0000 0x400>; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ck_flexgen_08>; + feature-domains = <&rifsc 32>; status = "disabled"; }; };
RIFSC is a firewall controller. Change its compatible so that is matches the documentation and reference RIFSC as a feature-domain-controller. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)