From patchwork Fri Jul 7 09:51:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Achal Verma X-Patchwork-Id: 13304667 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7E4A6EB64D9 for ; Fri, 7 Jul 2023 09:52:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=lwOmC6lFzMO78NlNMsbPK0CHF9f6x8QH77SCIHrf3h8=; b=mtrLc3RkvWzhZF ycQct+wNNniefhArSVcDnIc9BCI4OuuSegUa1kyOXViwW9IJuELVNlqIaeiGwFGWF2ZppumavbVEO v3ypWOPfPBaJY8DGWFoYGP4lYBc0t0PahY4zYgVTwqMGxUWVvv4rVVzLSWdwccVm4Yt6I28XLDCz1 nYs8jQETA1z80qferaAQ+xlrc3LHXGXHP/yHZNlKqvVDqYEAMzfQV1KFKtdW1pE5quGmuAhsgyhvM 11nGHefdBm4CEFmUwfg6x9zw9vZxhyoK/1DLHVzhalsIbQPx40ZALxJm9kSTQja5v34Sb3kHQIC6I IcXRd+1VubUptvwU/3ow==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qHi7s-004Ayb-13; Fri, 07 Jul 2023 09:51:44 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qHi7p-004Ap9-12 for linux-arm-kernel@lists.infradead.org; Fri, 07 Jul 2023 09:51:42 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3679pLQh006874; Fri, 7 Jul 2023 04:51:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1688723481; bh=qDLhtas3u/8HJM6Jwdk+LzFdFPztFG/DMXDGaDAWII0=; h=From:To:CC:Subject:Date; b=MIP1BVgEKJ3bX0GOsyL3+CLm/36bOVpOLMOlA+t2ueKoSH3kSoI6v4OT5iYIdTY+Z qSc+uq/OmHBJTrTmKdCu2DgUBv33JkgA2UzFyvEz75VJ4rbQtPt3Jv+iCvR5Q2LRZy 4VWCnwlR6FZv0uLO3dQId7Rp3/5NGB360RLzzDWA= Received: from DFLE110.ent.ti.com (dfle110.ent.ti.com [10.64.6.31]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3679pLSh122036 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 7 Jul 2023 04:51:21 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 7 Jul 2023 04:51:20 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 7 Jul 2023 04:51:20 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3679pKTB065814; Fri, 7 Jul 2023 04:51:20 -0500 From: Achal Verma To: Vignesh Raghavendra , Lorenzo Pieralisi , Krzysztof Wilczy_ski , Rob Herring , Bjorn Helgaas CC: , , , , Achal Verma Subject: [PATCH v3] PCI: j721e: Delay 100ms T_PVPERL from power stable to PERST# inactive Date: Fri, 7 Jul 2023 15:21:19 +0530 Message-ID: <20230707095119.447952-1-a-verma1@ti.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230707_025141_546541_11E33FBA X-CRM114-Status: GOOD ( 12.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org As per the PCIe Card Electromechanical specification REV. 5.0, PERST# signal should be de-asserted after minimum 100ms from the time power-rails become stable. So, to ensure 100ms delay to give sufficient time for power-rails and refclk to become stable, change delay from 100us to 100ms. From PCIe Card Electromechanical specification REV. 5.0 section 2.9.2: TPVPERL: Power stable to PERST# inactive - 100ms Fixes: f3e25911a430 ("PCI: j721e: Add TI J721E PCIe driver") Signed-off-by: Achal Verma --- Changes from v2: * Fix commit message. Change from v1: * Add macro for delay value. drivers/pci/controller/cadence/pci-j721e.c | 11 +++++------ drivers/pci/pci.h | 2 ++ 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index e70213c9060a..32b6a7dc3cff 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -498,14 +498,13 @@ static int j721e_pcie_probe(struct platform_device *pdev) /* * "Power Sequencing and Reset Signal Timings" table in - * PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0 - * indicates PERST# should be deasserted after minimum of 100us - * once REFCLK is stable. The REFCLK to the connector in RC - * mode is selected while enabling the PHY. So deassert PERST# - * after 100 us. + * PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 5.0 + * indicates PERST# should be deasserted after minimum of 100ms + * after power rails achieve specified operating limits and + * within this period reference clock should also become stable. */ if (gpiod) { - usleep_range(100, 200); + msleep(PCIE_TPVPERL_DELAY_MS); gpiod_set_value_cansleep(gpiod, 1); } diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index a4c397434057..6ab2367e5867 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -13,6 +13,8 @@ #define PCIE_LINK_RETRAIN_TIMEOUT_MS 1000 +#define PCIE_TPVPERL_DELAY_MS 100 /* see PCIe CEM r5.0, sec 2.9.2 */ + extern const unsigned char pcie_link_speed[]; extern bool pci_early_dump;