From patchwork Mon Jul 10 19:24:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jing Zhang X-Patchwork-Id: 13307537 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0B849C001DC for ; Mon, 10 Jul 2023 19:25:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=PJJ4IKeglNWAxzeqV2SfDGVr3QTGN4Pi1HA2Qp8ET90=; b=W8qrFG9VESUXy5GbhDLGsBHc+M ZZIKQEU3n94u6A9q2U4HoDzLLBj4pq0+4GP7cT6XYCHIQnAeQdSbcSgzLu7TF1o/Z1lJ/YJQr6ybo KZd+jM6mxLXaJv6Tf9RofxyTUCfC8FS1eCaxPDioS/cuQHBUJm7n0pHGnb9Tan9R86oZnTSAgtj+c oFgQ9z0oWd1x4VfBQRbOVDDFGDRg3hMZZhgtiIjIT7d4cawQZ9ywta5l5n04PT7kS5AjXu5VAVmHr PYJ/rjvAQQdCL+qzKx2MvPLJKW97+jFwmbbFJExLoJrv4g+kQxH8KYAyHkDhWeMaxCPBvwvnH0HdR 1OPc1fZg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qIwV6-00CYNl-2G; Mon, 10 Jul 2023 19:24:48 +0000 Received: from mail-pg1-x549.google.com ([2607:f8b0:4864:20::549]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qIwV3-00CYKb-07 for linux-arm-kernel@lists.infradead.org; Mon, 10 Jul 2023 19:24:46 +0000 Received: by mail-pg1-x549.google.com with SMTP id 41be03b00d2f7-553d076dce5so5583919a12.3 for ; Mon, 10 Jul 2023 12:24:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1689017083; x=1691609083; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=q8Pfm1k8D0yA8LpBE9VtBtVTcRMyZS82/djAneCpkmQ=; b=GDvwqv1MlzXGhRLJnLJVug7YjvSyOR6eGB5341bF6QxHQZRZgkvaDlH66y4otQAjxR 44UbQIWUSOEUnsrC+JRRpIOD794NJBNrvpilQ7LO6keqcvGltAH1FCmFC3SyXkOwYQ/0 crkiuQnUI2yGw0A4pjGjbwtLO3U6I5Dh1NwZzexJa3qLV/JxBB+WCx0PBSJDgoXI72sq LXWeycLBLLeq7lyQ+Kz3VJhHfDhYEvJ/rpKj4QaoZuWnuNfv2i5xlOK+8ONgEsLm1Gze 4kc8pmZHweX9syFCVFkCQQ7hmDa3KevbPWic1vjbctzP5FGA9XSCZpASTHh3DdJ0ZRsF merg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689017083; x=1691609083; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=q8Pfm1k8D0yA8LpBE9VtBtVTcRMyZS82/djAneCpkmQ=; b=fQq/m98QglOsZVw3zH9F8a0bPjiTCM4AXMaCQ0FkDcxIM/adRkjNhc43ijSbxH5LeX pckgmYt0zacjSPY3Sz2em860ldB7khrUzEcSfgZSgs1jbGGOJD+sxrTYoONLIonE1Wlx OFXwVmCh7hVpGLutSSC7YcWHb3gH06MDH5/aS37CVZolTBNZatCoeo9ERFuYlilRw69Y m/fZjY29yZtL4QroXO2Yxt11CEc99nBgQS53sROcekwKttEf33YxwBeB9u/nMbIxXiv4 JomnDaXWreUrKRx8ee8pXs7jYgEleCe3zZS8X/Q8vBK4X3QBonCjYBex4/VKLzCw1AlR ilXA== X-Gm-Message-State: ABy/qLbBWB/dIQxHkN6BcuHWCdQ7eOJtDTTL6cXbnZy3h1h380A290hd oEoQVnjDMyQdf7YAm+/fXWT9eo5xoP8LOPoIcA== X-Google-Smtp-Source: APBJJlGBCHc1RRKkPANqOkNMUbhIdTsh4hoWApD9cH5zSD49oQpk7M8yIJXyvY9F4ifLaUr+n7yMTQtPbIKIxkg7Jw== X-Received: from jgzg.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1acf]) (user=jingzhangos job=sendgmr) by 2002:a63:6:0:b0:550:d2d6:525b with SMTP id 6-20020a630006000000b00550d2d6525bmr9180529pga.12.1689017082796; Mon, 10 Jul 2023 12:24:42 -0700 (PDT) Date: Mon, 10 Jul 2023 19:24:28 +0000 In-Reply-To: <20230710192430.1992246-1-jingzhangos@google.com> Mime-Version: 1.0 References: <20230710192430.1992246-1-jingzhangos@google.com> X-Mailer: git-send-email 2.41.0.255.g8b1d071c50-goog Message-ID: <20230710192430.1992246-6-jingzhangos@google.com> Subject: [PATCH v5 5/6] KVM: arm64: Enable writable for ID_AA64MMFR{0, 1, 2, 3}_EL1 From: Jing Zhang To: KVM , KVMARM , ARMLinux , Marc Zyngier , Oliver Upton Cc: Will Deacon , Paolo Bonzini , James Morse , Alexandru Elisei , Suzuki K Poulose , Fuad Tabba , Reiji Watanabe , Raghavendra Rao Ananta , Suraj Jitindar Singh , Cornelia Huck , Jing Zhang X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230710_122445_073161_41D9973C X-CRM114-Status: GOOD ( 11.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable writable from userspace for ID_AA64MMFR{0, 1, 2, 3}_EL1. Added a macro for defining general writable idregs. Signed-off-by: Jing Zhang --- arch/arm64/kvm/sys_regs.c | 38 +++++++++++++++++++++++++++++++------- 1 file changed, 31 insertions(+), 7 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 967ecd57a86a..78ccc95624fa 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1340,9 +1340,6 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu, val &= ~ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_WFxT); val &= ~ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_MOPS); break; - case SYS_ID_AA64MMFR2_EL1: - val &= ~ID_AA64MMFR2_EL1_CCIDX_MASK; - break; case SYS_ID_MMFR4_EL1: val &= ~ARM64_FEATURE_MASK(ID_MMFR4_EL1_CCIDX); break; @@ -1566,6 +1563,18 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu, return set_id_reg(vcpu, rd, val); } +static u64 read_sanitised_id_aa64mmfr2_el1(struct kvm_vcpu *vcpu, + const struct sys_reg_desc *rd) +{ + u64 val; + u32 id = reg_to_encoding(rd); + + val = read_sanitised_ftr_reg(id); + val &= ~ID_AA64MMFR2_EL1_CCIDX_MASK; + + return val; +} + /* * cpufeature ID register user accessors * @@ -1840,6 +1849,16 @@ static unsigned int elx2_visibility(const struct kvm_vcpu *vcpu, .val = 0, \ } +#define ID_SANITISED_WRITABLE(name) { \ + SYS_DESC(SYS_##name), \ + .access = access_id_reg, \ + .get_user = get_id_reg, \ + .set_user = set_id_reg, \ + .visibility = id_visibility, \ + .reset = kvm_read_sanitised_id_reg, \ + .val = GENMASK(63, 0), \ +} + /* sys_reg_desc initialiser for known cpufeature ID registers */ #define AA32_ID_SANITISED(name) { \ SYS_DESC(SYS_##name), \ @@ -2061,10 +2080,15 @@ static const struct sys_reg_desc sys_reg_descs[] = { ID_UNALLOCATED(6,7), /* CRm=7 */ - ID_SANITISED(ID_AA64MMFR0_EL1), - ID_SANITISED(ID_AA64MMFR1_EL1), - ID_SANITISED(ID_AA64MMFR2_EL1), - ID_SANITISED(ID_AA64MMFR3_EL1), + ID_SANITISED_WRITABLE(ID_AA64MMFR0_EL1), + ID_SANITISED_WRITABLE(ID_AA64MMFR1_EL1), + { SYS_DESC(SYS_ID_AA64MMFR2_EL1), + .access = access_id_reg, + .get_user = get_id_reg, + .set_user = set_id_reg, + .reset = read_sanitised_id_aa64mmfr2_el1, + .val = GENMASK(63, 0), }, + ID_SANITISED_WRITABLE(ID_AA64MMFR3_EL1), ID_UNALLOCATED(7,4), ID_UNALLOCATED(7,5), ID_UNALLOCATED(7,6),