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Tue, 11 Jul 2023 13:58:15 -0700 (PDT) X-Google-Smtp-Source: APBJJlGMM6rSAUBx2gHMgpN1hCMMVYXQ4ts3fvOEU1AYs0oR+Y47D9PvRxELDW1bK1hOX+hNQmSRfQ== X-Received: by 2002:a0d:dd0f:0:b0:55a:3ce9:dc3d with SMTP id g15-20020a0ddd0f000000b0055a3ce9dc3dmr16784156ywe.13.1689109095299; Tue, 11 Jul 2023 13:58:15 -0700 (PDT) Received: from halaney-x13s.attlocal.net ([2600:1700:1ff0:d0e0::22]) by smtp.gmail.com with ESMTPSA id j136-20020a81928e000000b00545a08184cesm785353ywg.94.2023.07.11.13.58.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Jul 2023 13:58:14 -0700 (PDT) From: Andrew Halaney To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org, mcoquelin.stm32@gmail.com, pabeni@redhat.com, kuba@kernel.org, edumazet@google.com, davem@davemloft.net, joabreu@synopsys.com, alexandre.torgue@foss.st.com, peppe.cavallaro@st.com, bhupesh.sharma@linaro.org, vkoul@kernel.org, linux-arm-msm@vger.kernel.org, jsuraj@qti.qualcomm.com, Andrew Halaney Subject: [PATCH RFC/RFT net-next 2/3] net: stmmac: dwmac-qcom-ethqos: Use max frequency for clk_ptp_ref Date: Tue, 11 Jul 2023 15:35:31 -0500 Message-ID: <20230711205732.364954-3-ahalaney@redhat.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230711205732.364954-1-ahalaney@redhat.com> References: <20230711205732.364954-1-ahalaney@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230711_135818_940018_2AEB1175 X-CRM114-Status: GOOD ( 13.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Qualcomm clocks can set their frequency to a variety of levels generally. Let's use the max for clk_ptp_ref to ensure the best timestamping resolution possible. Without this, the default value of the clock is used. For sa8775p-ride this is 19.2 MHz, far less than the 230.4 MHz possible. Signed-off-by: Andrew Halaney Reviewed-by: Simon Horman --- .../stmicro/stmmac/dwmac-qcom-ethqos.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 757504ebb676..f9e7440520fa 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -694,6 +694,23 @@ static void ethqos_clks_disable(void *data) ethqos_clks_config(data, false); } +static void ethqos_ptp_clk_freq_config(struct stmmac_priv *priv) +{ + struct plat_stmmacenet_data *plat_dat = priv->plat; + int err; + + if (!plat_dat->clk_ptp_ref) + return; + + /* Max the PTP ref clock out to get the best resolution possible */ + err = clk_set_rate(plat_dat->clk_ptp_ref, ULONG_MAX); + if (err) + netdev_err(priv->dev, "Failed to max out clk_ptp_ref: %d\n", err); + plat_dat->clk_ptp_rate = clk_get_rate(plat_dat->clk_ptp_ref); + + netdev_dbg(priv->dev, "PTP rate %d\n", plat_dat->clk_ptp_rate); +} + static int qcom_ethqos_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -779,6 +796,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev) plat_dat->bsp_priv = ethqos; plat_dat->fix_mac_speed = ethqos_fix_mac_speed; plat_dat->dump_debug_regs = rgmii_dump; + plat_dat->ptp_clk_freq_config = ethqos_ptp_clk_freq_config; plat_dat->has_gmac4 = 1; if (ethqos->has_emac_ge_3) plat_dat->dwmac4_addrs = &data->dwmac4_addrs;