@@ -1,4 +1,5 @@
// SPDX-License-Identifier: GPL-2.0
+#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/mfd/syscon.h>
#include <linux/slab.h>
@@ -28,13 +29,13 @@ static const struct clk_pll_characteristics sam9rl_plla_characteristics = {
.out = sam9rl_plla_out,
};
-static const struct {
+static struct {
char *n;
- char *p;
+ struct clk_hw *parent_hw;
u8 id;
} at91sam9rl_systemck[] = {
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
};
static const struct {
@@ -67,23 +68,25 @@ static const struct {
static void __init at91sam9rl_pmc_setup(struct device_node *np)
{
- const char *slck_name, *mainxtal_name;
+ struct clk_hw *parent_hws[5], *hw, *slow_clk_hw, *main_xtal_hw;
+ const char *main_xtal_name = "main_xtal";
struct pmc_data *at91sam9rl_pmc;
- const char *parent_names[6];
struct regmap *regmap;
- struct clk_hw *hw;
+ struct clk *clk;
int i;
- i = of_property_match_string(np, "clock-names", "slow_clk");
- if (i < 0)
+ clk = of_clk_get_by_name(np, "slow_clk");
+ if (IS_ERR(clk))
return;
-
- slck_name = of_clk_get_parent_name(np, i);
-
- i = of_property_match_string(np, "clock-names", "main_xtal");
- if (i < 0)
+ slow_clk_hw = __clk_get_hw(clk);
+ if (!slow_clk_hw)
+ return;
+ clk = of_clk_get_by_name(np, main_xtal_name);
+ if (IS_ERR(clk))
+ return;
+ main_xtal_hw = __clk_get_hw(clk);
+ if (!main_xtal_hw)
return;
- mainxtal_name = of_clk_get_parent_name(np, i);
regmap = device_node_to_regmap(np);
if (IS_ERR(regmap))
@@ -95,13 +98,13 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
if (!at91sam9rl_pmc)
return;
- hw = at91_clk_register_rm9200_main(regmap, "mainck", mainxtal_name, NULL);
+ hw = at91_clk_register_rm9200_main(regmap, "mainck", NULL, main_xtal_hw);
if (IS_ERR(hw))
goto err_free;
at91sam9rl_pmc->chws[PMC_MAIN] = hw;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
+ hw = at91_clk_register_pll(regmap, "pllack", NULL, at91sam9rl_pmc->chws[PMC_MAIN], 0,
&at91rm9200_pll_layout,
&sam9rl_plla_characteristics);
if (IS_ERR(hw))
@@ -109,18 +112,18 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
at91sam9rl_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
+ hw = at91_clk_register_utmi(regmap, NULL, "utmick", NULL, at91sam9rl_pmc->chws[PMC_MAIN]);
if (IS_ERR(hw))
goto err_free;
at91sam9rl_pmc->chws[PMC_UTMI] = hw;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "pllack";
- parent_names[3] = "utmick";
+ parent_hws[0] = slow_clk_hw;
+ parent_hws[1] = at91sam9rl_pmc->chws[PMC_MAIN];
+ parent_hws[2] = at91sam9rl_pmc->chws[PMC_PLLACK];
+ parent_hws[3] = at91sam9rl_pmc->chws[PMC_UTMI];
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- parent_names, NULL,
+ NULL, parent_hws,
&at91rm9200_master_layout,
&sam9rl_mck_characteristics,
&sam9rl_mck_lock);
@@ -128,7 +131,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
goto err_free;
hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL,
+ NULL, hw,
&at91rm9200_master_layout,
&sam9rl_mck_characteristics,
&sam9rl_mck_lock, CLK_SET_RATE_GATE, 0);
@@ -137,18 +140,18 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
at91sam9rl_pmc->chws[PMC_MCK] = hw;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "pllack";
- parent_names[3] = "utmick";
- parent_names[4] = "masterck_div";
+ parent_hws[0] = slow_clk_hw;
+ parent_hws[1] = at91sam9rl_pmc->chws[PMC_MAIN];
+ parent_hws[2] = at91sam9rl_pmc->chws[PMC_PLLACK];
+ parent_hws[3] = at91sam9rl_pmc->chws[PMC_UTMI];
+ parent_hws[4] = at91sam9rl_pmc->chws[PMC_MCK];
for (i = 0; i < 2; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 5, i,
+ NULL, parent_hws, 5, i,
&at91rm9200_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -157,9 +160,12 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
at91sam9rl_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ at91sam9rl_systemck[0].parent_hw = at91sam9rl_pmc->pchws[0];
+ at91sam9rl_systemck[1].parent_hw = at91sam9rl_pmc->pchws[1];
for (i = 0; i < ARRAY_SIZE(at91sam9rl_systemck); i++) {
hw = at91_clk_register_system(regmap, at91sam9rl_systemck[i].n,
- at91sam9rl_systemck[i].p, NULL,
+ NULL, at91sam9rl_systemck[i].parent_hw,
at91sam9rl_systemck[i].id, 0);
if (IS_ERR(hw))
goto err_free;
@@ -170,7 +176,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
for (i = 0; i < ARRAY_SIZE(at91sam9rl_periphck); i++) {
hw = at91_clk_register_peripheral(regmap,
at91sam9rl_periphck[i].n,
- "masterck_div", NULL,
+ NULL, at91sam9rl_pmc->chws[PMC_MCK],
at91sam9rl_periphck[i].id);
if (IS_ERR(hw))
goto err_free;
Switch AT91SAM9RL clocks to use parent_hw and parent_data. Having parent_hw instead of parent names improves to clock registration speed and re-parenting. Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> --- drivers/clk/at91/at91sam9rl.c | 70 +++++++++++++++++++---------------- 1 file changed, 38 insertions(+), 32 deletions(-)