From patchwork Tue Aug 1 18:35:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 13337162 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BCCF5C04A6A for ; Tue, 1 Aug 2023 18:39:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=t7OtPNnAovHpdpvC21TUqqR+L35Ois9JDLFJd3iaZRc=; b=TDeF/QjwsKCSTTl9s/R0JvJITM X0yGRocEm/LJUYwAwgjYr6KsJoLQK0d2F8M79JkC/F5bHqqjvBnA+oWRiAcvmgU8xlic/QPVkuZ2+ o4p8LXchLr1MK2qMrkvaSGXfW2QtuLQxwxqvpMaGwKElWoiPYLJpq2RTjMWFMwRhg/exqQ99jDbXe Lz7MujrruooYdl+MjM+jDS9UjYeUQBcy8mITixo+lYrXj1Wx4z5T9OL/BTZTdE6LtClvFvkxIoOGF ETknn9BrPG9SzVMY3/014JX7Lo1LfIy6gbwj7xm5Yka+Hwi/HZXYHuhl1Mcir6pYkZnnmXWvYmZnj /rHyPktw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qQuH3-0032uQ-2y; Tue, 01 Aug 2023 18:39:13 +0000 Received: from mail-yb1-xb4a.google.com ([2607:f8b0:4864:20::b4a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qQuGz-0032q3-2S for linux-arm-kernel@lists.infradead.org; Tue, 01 Aug 2023 18:39:11 +0000 Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-d064a458dd5so4831396276.1 for ; Tue, 01 Aug 2023 11:39:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1690915146; x=1691519946; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=JdJVm/jEcegurWxMLywzO5qAAqQ1pj5h79mr3KehF7s=; b=7Pof5p/ruCK44RZ9XO2ZDH7mLpC+nNWDaepCVNuu4v6H5JAlestoM3MVfwPeyz7fZf xY9EaG14OzQ52SKikb3ay09ybDg1BFoZwMEqyiMoOKOKeLsCJq+l2sfgM47q1cAz/S8W gHTrhxHyg7pROOPUFPj6O5vXGaoikN6UCSbBgKJm6IirRnPb9bSWHpZHZN2KPc21FhNE 6hrGEC9dN6jNwmGtnhM/g3S5MV+y7LV0DgsfyYbUm43P2lVELq/lBC0DdMfPQuPCPW/C HmE+dVGr7b4xAyHFz2rB72daFWuTW14VrHF9VUBGzlIDn7La4lGXxlKysjHVxZ/9y43m lShg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690915146; x=1691519946; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=JdJVm/jEcegurWxMLywzO5qAAqQ1pj5h79mr3KehF7s=; b=hIajzT5Pltqr0a55+E9yJro/j7f+xNgitPI3SeJhceLGp+aJsUj8pFyFUjVhwXjnUP 3Skv7eOtgtUgxXC6CfxX+CmJiMY+RStundKEjFDJG1/LefCbMuiB/rMG5ZhX950JU0ty 98V+vO+FsmDkEQ3+wmWe/QVjRWdBjUD8SGYjo65NENDsVe37Vfy8wmBhSiGluuGAh+74 NabJyWvWvUejHA/nGHOLQclkUONnlhDP0TrrEFmFASiqKgBocX7B78Onq8zJgCs0yXRw Jwu7i/DrnXG9woQxndQDeSO9mxAvCS+BTHjGwltGbvVxcAFEab9AHFTC0CWsDIqcd062 P33Q== X-Gm-Message-State: ABy/qLbeOHSTSzGuzCtlv2sZXKCnGwQWddxWF5DGNqdwwkKwf1Ot00f0 06VecC+fj9osPoX5LGYJfrY/Q4SvZG18 X-Google-Smtp-Source: APBJJlHCy/eD1nfcypDGAcoiCb+YNa0Afat43VBJmS6hV3eCZMQEtRQ92r8y5gfPrjhq8h5mdGvrfXC8oJ22 X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:a54:d53d:50e4:b5b8]) (user=mshavit job=sendgmr) by 2002:a25:86cb:0:b0:d13:856b:c10a with SMTP id y11-20020a2586cb000000b00d13856bc10amr93266ybm.3.1690915146152; Tue, 01 Aug 2023 11:39:06 -0700 (PDT) Date: Wed, 2 Aug 2023 02:35:20 +0800 In-Reply-To: <20230801183845.4026101-1-mshavit@google.com> Mime-Version: 1.0 References: <20230801183845.4026101-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog Message-ID: <20230802023524.v3.3.I875254464d044a8ce8b3a2ad6beb655a4a006456@changeid> Subject: [PATCH v3 3/8] iommu/arm-smmu-v3: Encapsulate ctx_desc_cfg init in alloc_cd_tables From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: robin.murphy@arm.com, will@kernel.org, jean-philippe@linaro.org, jgg@nvidia.com, nicolinc@nvidia.com, Michael Shavit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230801_113909_799719_56F9D4D7 X-CRM114-Status: GOOD ( 12.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is slighlty cleaner: arm_smmu_ctx_desc_cfg is initialized in a single function instead of having pieces set ahead-of time by its caller. Signed-off-by: Michael Shavit Reviewed-by: Jason Gunthorpe --- (no changes since v1) drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index ded613aedbb04..fe4b19c3b8dee 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1132,7 +1132,8 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, return 0; } -static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain) +static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain, + struct arm_smmu_master *master) { int ret; size_t l1size; @@ -1140,6 +1141,7 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain) struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; + cdcfg->max_cds_bits = master->ssid_bits; max_contexts = 1 << cdcfg->max_cds_bits; if (!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB) || @@ -2107,7 +2109,6 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, int ret; u32 asid; struct arm_smmu_device *smmu = smmu_domain->smmu; - struct arm_smmu_ctx_desc_cfg *cd_table = &smmu_domain->cd_table; struct arm_smmu_ctx_desc *cd = &smmu_domain->cd; typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr = &pgtbl_cfg->arm_lpae_s1_cfg.tcr; @@ -2120,11 +2121,9 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (ret) goto out_unlock; - cd_table->max_cds_bits = master->ssid_bits; - smmu_domain->stall_enabled = master->stall_enabled; - ret = arm_smmu_alloc_cd_tables(smmu_domain); + ret = arm_smmu_alloc_cd_tables(smmu_domain, master); if (ret) goto out_free_asid;