From patchwork Tue Aug 1 18:35:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 13337165 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 366D1C0015E for ; Tue, 1 Aug 2023 18:39:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=wr57rtjwYaxJZ4uRpOA81+t6GKb0XYQ0dVcDvEjZBHE=; b=qz5hrYiPBg2ROAPrvLDnHlpzg/ QhYqV3ST2smf3N6MPnqRqCR3xQZpx0/Maxd08Hd1cNaHpwiKVH9ChaMoqU8As8uNfJwh7shQOgYPL YJWenzhmmqEgQjB2DYgLBLbap/azIOZTEMwf+ELm3PrJFmjMTdNONDI8j7B18UZ6JDsJ0+x0x0TsO zg1yxLiPbndeTsirPv009Sl+DiRLX9neLkUi7MtXgjvdodU+1Q8AB3spbdJpEu3281pTaMRnhtuz2 Fo+V+cJK56ekM6tJDY9bEzVvPucLUB9VaK79zHSqWx7xwrcYMt/yLdzBvPi+u5agpsHcPrtcQL53N uBWWNsvQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qQuHJ-00334f-0p; Tue, 01 Aug 2023 18:39:29 +0000 Received: from mail-yw1-x114a.google.com ([2607:f8b0:4864:20::114a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qQuHF-00331M-2q for linux-arm-kernel@lists.infradead.org; Tue, 01 Aug 2023 18:39:27 +0000 Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-57320c10635so69966007b3.3 for ; Tue, 01 Aug 2023 11:39:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1690915164; x=1691519964; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=zsOLF65GCnXc9xKNLgceJ3I7vQXpvGjuscvCrSUFmw0=; b=2lYCxVWeQ0XEbkaQCNlXmhkYY1Kddd521lbbTuATXI6HVCwfX4ZbVxfWE6VfMRva/L 3Ct0jredgG+9aQzrxInlmujaq12uQZjp6ylQi9BXuqmb2qytUTybE7o0QTJw7nzoLnkM 8s4H+06T5uZKGYi8wEcf1n/Tci3igvOBSxV4S+yZl79EGASbRc0CZ/togSNvBOcrnXvU Kg/VCSL1rl4AWel2PaVZZtLplRbQaYvRJQWmYLmfMfjqYZ3cAAna4hFrRFVB0ZK7tuUd Xy2SIOee1UdOvQU5vB3mTlPPU+4g8q8J/RMNVp+J+W4u5DJPKBzvgASjh1DefH2DaLKn X8Ew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690915164; x=1691519964; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=zsOLF65GCnXc9xKNLgceJ3I7vQXpvGjuscvCrSUFmw0=; b=HqELDxmiEoMUwwBrMypCJnl/Z6aBRVZMy8hsSdUjdG/Q72nmwHmcDKDq+bbhyZDa7v aYbP8qdsOwwr9JwUW31c8d+y3znKGb+lA0RrwBWTznVxnS4OcZMc3ssf0Fd6HZiYqy+v 4q2jpJPlX5sfNAoh28LGmZNv91J0ZViy/HFKBoX3LsTT2gfkq+uFRC+K6lms6UZ+S4lf Lz7i96C0JDxJxcaQypcelTF9aZp+uokX3FfOxC+rkkIv6HA83B5WXEQ6ZBpp76+QpNz0 uCm6Xbk1yHgW07h6UfRO/ts3+ESPwKUh9l3FKKhSNjapfCo1oSxRtTnlfdWhBll4sbiy yjGg== X-Gm-Message-State: ABy/qLZR7BbxnStPRPvlQOzOWeWkSE9fSEkXWlYhvQanFOGhE6s9ffq8 y3cUImGSPHL363dcN32bAk2oFETZLkxA X-Google-Smtp-Source: APBJJlFC5DrFlCuMVG6r3RiWa+1GW1f0S3XPuNPTV23mWgKkgY/ZZvlGX5pSPQKSNgSnocZ0RmLFDH5A2Uve X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:a54:d53d:50e4:b5b8]) (user=mshavit job=sendgmr) by 2002:a25:c712:0:b0:d0c:1f08:5fef with SMTP id w18-20020a25c712000000b00d0c1f085fefmr82652ybe.12.1690915164624; Tue, 01 Aug 2023 11:39:24 -0700 (PDT) Date: Wed, 2 Aug 2023 02:35:24 +0800 In-Reply-To: <20230801183845.4026101-1-mshavit@google.com> Mime-Version: 1.0 References: <20230801183845.4026101-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.585.gd2178a4bd4-goog Message-ID: <20230802023524.v3.7.Idedc0f496231e2faab3df057219c5e2d937bbfe4@changeid> Subject: [PATCH v3 7/8] iommu/arm-smmu-v3: Skip cd sync if CD table isn't active From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: robin.murphy@arm.com, will@kernel.org, jean-philippe@linaro.org, jgg@nvidia.com, nicolinc@nvidia.com, Michael Shavit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230801_113925_920597_398B6F25 X-CRM114-Status: GOOD ( 19.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This commit explicitly keeps track of whether a CD table is installed in an STE so that arm_smmu_sync_cd can skip the sync when unnecessary. This was previously achieved through the domain->devices list, but we are moving to a model where arm_smmu_sync_cd directly operates on a master and the master's CD table instead of a domain. Signed-off-by: Michael Shavit Reviewed-by: Jason Gunthorpe --- Changes in v3: - Flip the cd_table.installed bit back off when table is detached - re-order the commit later in the series since flipping the installed bit to off isn't obvious when the cd_table is still shared by multiple masters. Changes in v2: - Store field as a bit instead of a bool. Fix comment about STE being live before the sync in write_ctx_desc(). drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 +++++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 ++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index b05963cd4e5b5..94922d4ff7be0 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -985,6 +985,9 @@ static void arm_smmu_sync_cd(struct arm_smmu_master *master, }, }; + if (!master->cd_table.installed) + return; + cmds.num = 0; for (i = 0; i < master->num_streams; i++) { cmd.cfgi.sid = master->streams[i].id; @@ -1091,7 +1094,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid, cdptr[3] = cpu_to_le64(cd->mair); /* - * STE is live, and the SMMU might read dwords of this CD in any + * STE may be live, and the SMMU might read dwords of this CD in any * order. Ensure that it observes valid values before reading * V=1. */ @@ -1360,6 +1363,9 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, cd_table->l1_desc ? STRTAB_STE_0_S1FMT_64K_L2 : STRTAB_STE_0_S1FMT_LINEAR); + cd_table->installed = true; + } else { + master->cd_table.installed = false; } if (s2_cfg) { diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index f2acfcc1af925..0ee3dc7291a15 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -599,6 +599,8 @@ struct arm_smmu_ctx_desc_cfg { u8 max_cds_bits; /* Whether CD entries in this table have the stall bit set. */ u8 stall_enabled:1; + /* Whether this CD table is installed in any STE */ + u8 installed:1; }; struct arm_smmu_s2_cfg {