| Message ID | 20230803003234.v4.4.I5aa89c849228794a64146cfe86df21fb71629384@changeid (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Refactor the SMMU's CD table ownership | expand |
On Thu, Aug 03, 2023 at 12:32:32AM +0800, Michael Shavit wrote: > This controls whether CD entries will have the stall bit set when > writing entries into the table. It'd be nicer to spare a few more lines here -- something like this yet feel free to rephrase: The stall bit of a CD entry should follow the master->stall_enabled and has an inverse relationship with the STE.S1STALLD bit. Also, a domain should be able to share between two masters, even if they have different stall_enabled configurations, in which case, two masters should have two sets of CD tables, i.e. having two different CD entries for the same domain holding a CD. So, move the "stall_enabled" out of domain to cd_table. It then controls whether CD entries will have the stall bit set when writing entries into the table. > Signed-off-by: Michael Shavit <mshavit@google.com> > Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> With that, Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> And btw, you should probably put your Signed-off-by at the end the commit log, i.e. behind "Reviewed-by", meaning you created/ updated the commit, and then signed it off. Nicolin
On Sat, Aug 5, 2023 at 7:32 AM Nicolin Chen <nicolinc@nvidia.com> wrote: > It'd be nicer to spare a few more lines here -- something like > this yet feel free to rephrase: Yeah you're right, this commit message was pretty sparse. Will update. > And btw, you should probably put your Signed-off-by at the end > the commit log, i.e. behind "Reviewed-by", meaning you created/ > updated the commit, and then signed it off. > > Nicolin Ah, thanks for the tip, will do as well :) .
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index fe4b19c3b8de..c01023404c26 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1114,7 +1114,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid) | CTXDESC_CD_0_V; - if (smmu_domain->stall_enabled) + if (smmu_domain->cd_table.stall_enabled) val |= CTXDESC_CD_0_S; } @@ -1141,6 +1141,7 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain, struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; + cdcfg->stall_enabled = master->stall_enabled; cdcfg->max_cds_bits = master->ssid_bits; max_contexts = 1 << cdcfg->max_cds_bits; @@ -2121,8 +2122,6 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (ret) goto out_unlock; - smmu_domain->stall_enabled = master->stall_enabled; - ret = arm_smmu_alloc_cd_tables(smmu_domain, master); if (ret) goto out_free_asid; @@ -2461,7 +2460,8 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) ret = -EINVAL; goto out_unlock; } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && - smmu_domain->stall_enabled != master->stall_enabled) { + smmu_domain->cd_table.stall_enabled != + master->stall_enabled) { ret = -EINVAL; goto out_unlock; } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 35a93e885887..05b1f0ee6080 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -597,6 +597,8 @@ struct arm_smmu_ctx_desc_cfg { unsigned int num_l1_ents; /* log2 of the maximum number of CDs supported by this table */ u8 max_cds_bits; + /* Whether CD entries in this table have the stall bit set. */ + u8 stall_enabled:1; }; struct arm_smmu_s2_cfg { @@ -714,7 +716,6 @@ struct arm_smmu_domain { struct mutex init_mutex; /* Protects smmu pointer */ struct io_pgtable_ops *pgtbl_ops; - bool stall_enabled; atomic_t nr_ats_masters; enum arm_smmu_domain_stage stage;