From patchwork Fri Aug 4 07:53:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kumar, Udit" X-Patchwork-Id: 13341435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1DC46C001DB for ; Fri, 4 Aug 2023 07:54:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=CZlG63io1ozVth5Ogl3qbXgonZ8HCnL2Qb98luwpGJg=; b=qV/0APmjbWcr0q 4KItxTMtajcgyrgjWBwjIvES6xZ62krCewEo3W7d1yfrLWxq4VFNxbNpFfEepHel+ePaDPmpZE1cw vtuhLRuSrrC72VNyJz6bJTdHpRzxTS7qQuCLwKfvDRtJPrgqI0ITzAK9CtTybBy+iC/PXtyAlxzJt 53UDtk+CJraoQVs7WixRZk0p0aAq0mP6Z9C6OjNfRB1Up5Iq7cJPJ7WHAqqen+vOMKnXPsJUlBdFn 0EN/xWVUliMGLkOl2Es8F3b/hO1kCc9evMjMcc8NG/KIvphkqbzAi3K1qW0DWdwhxCoQaFi8dkQkY 9vZq8ehpxgr8T7y6Siyg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qRpdI-00BpHa-0f; Fri, 04 Aug 2023 07:54:00 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qRpdF-00BpGe-1H for linux-arm-kernel@lists.infradead.org; Fri, 04 Aug 2023 07:53:59 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3747roab100435; Fri, 4 Aug 2023 02:53:50 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691135630; bh=PMXgapMkSvNeLPU1BlGgnxC2b0f+OZimPpo2yjtl2vo=; h=From:To:CC:Subject:Date; b=hdKRRrwpHxxlLfQZvxVNeQemVGunIANo+kt1UrFKYpmhT9NCBwenQXlHdnkU0DbKY HfuHUdBgF1tl6Jt618N/1y80g1FeM847D/zJoOTlNQOwebDKcTGqKHu0i0CPawpNlV GrKc1u68F1/IRDSBG4U6ABB5Ecz51rckg/rraebI= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3747robs107449 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 4 Aug 2023 02:53:50 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 4 Aug 2023 02:53:50 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 4 Aug 2023 02:53:50 -0500 Received: from udit-HP-Z2-Tower-G9-Workstation-Desktop-PC.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3747rjvx055067; Fri, 4 Aug 2023 02:53:46 -0500 From: Udit Kumar To: , , , , , , , , , , , , CC: Udit Kumar Subject: [PATCH v4] arm64: dts: ti: k3-j721s2: correct pinmux offset for ospi Date: Fri, 4 Aug 2023 13:23:41 +0530 Message-ID: <20230804075341.3858488-1-u-kumar1@ti.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230804_005357_518787_072A6096 X-CRM114-Status: GOOD ( 10.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Due to non-addressable regions in J721S2 SOC wkup_pmx was split into four regions from wkup_pmx0 to wkup_pmx3. Correcting OSPI1 pin mux, which now falls under wkup_pmx1. Along with that removing unused pin mux for OSPI-0. Fixes: 6bc829ceea41 ("arm64: dts: ti: k3-j721s2: Fix wkup pinmux range") Signed-off-by: Udit Kumar Reviewed-by: Vaishnav Achath --- Logs with v4 https://gist.github.com/uditkumarti/84a18d9c9a62fe0d22ee7c650340b12e line 980 and 983 Both flashes are detected Logs with original tree https://gist.github.com/uditkumarti/41d3d7ccf278d4e00e6da349478e58aa (line 1192) pin mux error, line 1209 and 1212 flashes are not detected dtbs_check run after applying https://lore.kernel.org/all/20230721082654.27036-1-tony@atomide.com/ Change log: Changes in v4: - Removed unused CS pin mux - Rebased and tested with next-20230804 - v3 : https://lore.kernel.org/all/20230803145655.806001-1-u-kumar1@ti.com/ Changes in v3: - Corrected wkup_pmx for ospi1 - Removed unused pin MCU_OSPI1_CSn1, shared with pmic - v2: https://lore.kernel.org/all/20230802113500.162276-1-u-kumar1@ti.com/ Changes in v2: - Changed name of pin mux to align with https://lore.kernel.org/all/20230721082654.27036-1-tony@atomide.com/ patch - v1: https://lore.kernel.org/all/20230801125626.3287306-1-u-kumar1@ti.com/ .../dts/ti/k3-j721s2-common-proc-board.dts | 19 ++++++++++--------- arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 3 --- 2 files changed, 10 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index 20b32563c0ed..e81ef8a7a8a2 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -282,18 +282,19 @@ J721S2_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (N26) MCU_ADC1_AIN6 */ J721S2_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (N27) MCU_ADC1_AIN7 */ >; }; +}; +&wkup_pmx1 { mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins { pinctrl-single,pins = < - J721S2_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */ - J721S2_WKUP_IOPAD(0x05c, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */ - J721S2_WKUP_IOPAD(0x060, PIN_OUTPUT, 0) /* (C21) MCU_OSPI1_CSn1 */ - J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */ - J721S2_WKUP_IOPAD(0x050, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */ - J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */ - J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */ - J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (B19) MCU_OSPI1_DQS */ - J721S2_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */ + J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */ + J721S2_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */ + J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */ + J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */ + J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */ + J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */ + J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B19) MCU_OSPI1_DQS */ + J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */ >; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi index 594766482071..a4006f328027 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -56,9 +56,6 @@ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { pinctrl-single,pins = < J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D19) MCU_OSPI0_CLK */ J721S2_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F15) MCU_OSPI0_CSn0 */ - J721S2_WKUP_IOPAD(0x030, PIN_OUTPUT, 0) /* (G17) MCU_OSPI0_CSn1 */ - J721S2_WKUP_IOPAD(0x038, PIN_OUTPUT, 0) /* (F14) MCU_OSPI0_CSn2 */ - J721S2_WKUP_IOPAD(0x03c, PIN_OUTPUT, 0) /* (F17) MCU_OSPI0_CSn3 */ J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C19) MCU_OSPI0_D0 */ J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */ J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (G15) MCU_OSPI0_D2 */