From patchwork Sun Aug 6 16:48:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Apurva Nandan X-Patchwork-Id: 13342879 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E9FA0C001B0 for ; Sun, 6 Aug 2023 16:49:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=q7334kx6HhvdptyatKCt1j8GRYjYMc3knO1I/R/MjVY=; b=jh+10yPR9fbhKH r8uniPAm4Vw0KLz73Y0gDJYDLMFH1f2RBVHd6367cE5MToOBYf/mSAt3GOhdhZTjIVUueSEWdDBsy 9KCJ7aZss8hfye9YJnrYEzyKF9qcSRaeWBoEaJUvD9PgN+09cZpN4YPVb07g5JdCEf5bm7Y7GGV4D UNcaob9wID+tR9D2wwAr96iA1VGRGJyhjUGoTGIt4ujjnxsl044nuznZa03aS2o5cGToTTmPnBCX1 Cj/+5Ln/6KxItgp3BNxknDYJWYghysp4DDaqVgZyei7G30lLsO5s+e/3zLAehz1vPnZlREtMzYgA+ 8VIfwoOdSnHjHa3+I7Bg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qSgwD-00FePu-2F; Sun, 06 Aug 2023 16:49:05 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qSgwB-00FeOt-1W for linux-arm-kernel@lists.infradead.org; Sun, 06 Aug 2023 16:49:05 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 376Gmsej006540; Sun, 6 Aug 2023 11:48:54 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691340534; bh=JPRORifvGrUrwDZIN/iGzlfeEl6AVt2arl7a65Q6VzE=; h=From:To:Subject:Date:In-Reply-To:References; b=WLA6OcoXxT+uCPp3wZFmohvOketKmXWuIdGkHD/QtmcI1xosngtp69dCOlwLOI8r4 zJ9cVJyneexZuSLiBXfk9nXk1vpBtvhBJJuT3SBmhymsoBSMlVisZfevnB1vfG+OjA 15/a/ncV+YYjuo2GpN04rOwVEpjb+BnEdrolMNwE= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 376GmsXM074078 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 6 Aug 2023 11:48:54 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sun, 6 Aug 2023 11:48:53 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sun, 6 Aug 2023 11:48:53 -0500 Received: from TI.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 376GmdMa009591; Sun, 6 Aug 2023 11:48:50 -0500 From: Apurva Nandan To: Apurva Nandan , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , Udit Kumar , Hari Nagalla Subject: [PATCH 3/3] arm64: dts: ti: k3-j784s4-evm: Add bootph-pre-ram property for SPL nodes Date: Sun, 6 Aug 2023 22:18:38 +0530 Message-ID: <20230806164838.18088-4-a-nandan@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230806164838.18088-1-a-nandan@ti.com> References: <20230806164838.18088-1-a-nandan@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230806_094903_588334_6BBFB9DF X-CRM114-Status: GOOD ( 10.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add bootph-pre-ram property for all the nodes used in SPL stage, for syncing it later to u-boot j784s4 dts. Signed-off-by: Apurva Nandan --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index 1e38a8f1bec5..12455baf68b0 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -252,7 +252,9 @@ vdd_sd_dv: regulator-TLV71033 { }; &main_pmx0 { + bootph-pre-ram; main_uart8_pins_default: main-uart8-default-pins { + bootph-pre-ram; pinctrl-single,pins = < J784S4_IOPAD(0x040, PIN_INPUT, 14) /* (AF37) MCASP0_AXR0.UART8_CTSn */ J784S4_IOPAD(0x044, PIN_OUTPUT, 14) /* (AG37) MCASP0_AXR1.UART8_RTSn */ @@ -269,6 +271,7 @@ J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */ }; main_mmc1_pins_default: main-mmc1-default-pins { + bootph-pre-ram; pinctrl-single,pins = < J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */ J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */ @@ -289,7 +292,9 @@ J784S4_IOPAD(0x020, PIN_INPUT, 7) /* (AJ35) MCAN15_RX.GPIO0_8 */ }; &wkup_pmx2 { + bootph-pre-ram; wkup_uart0_pins_default: wkup-uart0-default-pins { + bootph-pre-ram; pinctrl-single,pins = < J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */ J721S2_WKUP_IOPAD(0x074, PIN_INPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */ @@ -299,6 +304,7 @@ J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */ }; wkup_i2c0_pins_default: wkup-i2c0-default-pins { + bootph-pre-ram; pinctrl-single,pins = < J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */ J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */ @@ -306,6 +312,7 @@ J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */ }; mcu_uart0_pins_default: mcu-uart0-default-pins { + bootph-pre-ram; pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (H37) WKUP_GPIO0_14.MCU_UART0_CTSn */ J784S4_WKUP_IOPAD(0x094, PIN_OUTPUT, 0) /* (K37) WKUP_GPIO0_15.MCU_UART0_RTSn */ @@ -366,7 +373,9 @@ J784S4_WKUP_IOPAD(0x170, PIN_INPUT, 0) /* (Y36) MCU_ADC1_AIN7 */ }; &wkup_pmx0 { + bootph-pre-ram; mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { + bootph-pre-ram; pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */ J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */ @@ -385,6 +394,7 @@ J784S4_WKUP_IOPAD(0x038, PIN_OUTPUT, 6) /* (B34) MCU_OSPI0_CSn2.MCU_OSPI0_RESET_ }; mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins { + bootph-pre-ram; pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (F32) MCU_OSPI1_CLK */ J784S4_WKUP_IOPAD(0x05c, PIN_OUTPUT, 0) /* (G32) MCU_OSPI1_CSn0 */ @@ -399,6 +409,7 @@ J784S4_WKUP_IOPAD(0x044, PIN_INPUT, 0) /* (C31) MCU_OSPI1_LBCLKO */ }; &wkup_uart0 { + bootph-pre-ram; /* Firmware usage */ status = "reserved"; pinctrl-names = "default"; @@ -406,6 +417,7 @@ &wkup_uart0 { }; &wkup_i2c0 { + bootph-pre-ram; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&wkup_i2c0_pins_default>; @@ -419,12 +431,14 @@ eeprom@50 { }; &mcu_uart0 { + bootph-pre-ram; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_uart0_pins_default>; }; &main_uart8 { + bootph-pre-ram; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_uart8_pins_default>; @@ -435,15 +449,18 @@ &ufs_wrapper { }; &fss { + bootph-pre-ram; status = "okay"; }; &ospi0 { + bootph-pre-ram; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; flash@0 { + bootph-pre-ram; compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <8>; @@ -491,6 +508,7 @@ partition@800000 { }; partition@3fc0000 { + bootph-pre-ram; label = "ospi.phypattern"; reg = <0x3fc0000 0x40000>; }; @@ -499,11 +517,13 @@ partition@3fc0000 { }; &ospi1 { + bootph-pre-ram; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; flash@0 { + bootph-pre-ram; compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <1>; @@ -551,6 +571,7 @@ partition@800000 { }; partition@3fc0000 { + bootph-pre-ram; label = "qspi.phypattern"; reg = <0x3fc0000 0x40000>; }; @@ -595,6 +616,7 @@ exp2: gpio@22 { }; &main_sdhci0 { + bootph-pre-ram; /* eMMC */ status = "okay"; non-removable; @@ -603,6 +625,7 @@ &main_sdhci0 { }; &main_sdhci1 { + bootph-pre-ram; /* SD card */ status = "okay"; pinctrl-0 = <&main_mmc1_pins_default>;