From patchwork Tue Aug 8 11:46:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 13345970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 67CA9C001DF for ; Tue, 8 Aug 2023 11:47:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2UcJCPRTIL4dwQLVSizxnpdhsApvRgKagLIVwLA5VLk=; b=g4c6sdR2GVrN/X i+sBW/Q1FBDjIoeBfBYDFjMObjGQNxmmY4ydRA9U6Upa9W6yxWrHin4/m71S34u6c09AX18o1h6KT OGL2PtpaQRHQgrPiESZ3LThq6XfQNarPCD4BFK/pBfT9bVhHTVYtnO+gx4A010TQSUfCuZxFexIif +Cgu7M/yb/Dlge0/E8w8e6TVj/fZ+eL09Yok2h6e0mg1iAs16QXRXzmTNEYGiyBngKQnfkmxyukP+ qUDzjY7y1pQRsus7g3vwjPlQQxEmaDFfXmmHYkUlZybGysIEdQ/ltYEE+iREqur17AH8ce2UGBs3T cNX1naIqaRp1PF2M53uA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qTLBR-002UT5-2v; Tue, 08 Aug 2023 11:47:29 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qTLBI-002UNp-23 for linux-arm-kernel@lists.infradead.org; Tue, 08 Aug 2023 11:47:24 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 8FAED62508; Tue, 8 Aug 2023 11:47:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5AF0FC433CC; Tue, 8 Aug 2023 11:47:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691495238; bh=2H24dhbeM/jMCHj2d1Myg+GAD8aw5Ub3supzyrnz7E8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rxF+kcJzUhxY440F3f2qa3pUwmG6YrqDAheBZfv2i/ry88JSYl8BbNbC+c/i+Va/y aXxbN0ZhSmjlvbqvot9RlIYxw/4gztKsSe6uq98LU56id1z1SEKAzbY/eBjHKBktid X8zWgJuGnnluBoNz5J3WrACTUJE9D5N3SwfWwDMwGQ6l/BBvExbgm5tx7aZWfeo0aH KCEqcFrxbE1dPlrjHydFGx/4Bh1mgfYhsXDJPPSbfHIbV57WdZhxxNFlQivjynLLGq qKoEbB5WqfNLU/i6pP/JV0gHFIL4yPf76wwY8FXPevmY5MosU4UHC7wuBB3kEm4oXQ qUsj5/BUXdFRQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qTLBE-0037Ph-CG; Tue, 08 Aug 2023 12:47:16 +0100 From: Marc Zyngier To: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Catalin Marinas , Eric Auger , Mark Brown , Mark Rutland , Will Deacon , Alexandru Elisei , Andre Przywara , Chase Conklin , Ganapatrao Kulkarni , Darren Hart , Miguel Luis , James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: [PATCH v3 05/27] arm64: Add AT operation encodings Date: Tue, 8 Aug 2023 12:46:49 +0100 Message-Id: <20230808114711.2013842-6-maz@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230808114711.2013842-1-maz@kernel.org> References: <20230808114711.2013842-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, eric.auger@redhat.com, broonie@kernel.org, mark.rutland@arm.com, will@kernel.org, alexandru.elisei@arm.com, andre.przywara@arm.com, chase.conklin@arm.com, gankulkarni@os.amperecomputing.com, darren@os.amperecomputing.com, miguel.luis@oracle.com, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230808_044720_757602_209AFFE6 X-CRM114-Status: GOOD ( 11.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the encodings for the AT operation that are usable from NS. Reviewed-by: Eric Auger Signed-off-by: Marc Zyngier Acked-by: Catalin Marinas Reviewed-by: Miguel Luis Reviewed-by: Zenghui Yu Reviewed-by: Jing Zhang --- arch/arm64/include/asm/sysreg.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 72e18480ce62..76289339b43b 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -514,6 +514,23 @@ #define SYS_SP_EL2 sys_reg(3, 6, 4, 1, 0) +/* AT instructions */ +#define AT_Op0 1 +#define AT_CRn 7 + +#define OP_AT_S1E1R sys_insn(AT_Op0, 0, AT_CRn, 8, 0) +#define OP_AT_S1E1W sys_insn(AT_Op0, 0, AT_CRn, 8, 1) +#define OP_AT_S1E0R sys_insn(AT_Op0, 0, AT_CRn, 8, 2) +#define OP_AT_S1E0W sys_insn(AT_Op0, 0, AT_CRn, 8, 3) +#define OP_AT_S1E1RP sys_insn(AT_Op0, 0, AT_CRn, 9, 0) +#define OP_AT_S1E1WP sys_insn(AT_Op0, 0, AT_CRn, 9, 1) +#define OP_AT_S1E2R sys_insn(AT_Op0, 4, AT_CRn, 8, 0) +#define OP_AT_S1E2W sys_insn(AT_Op0, 4, AT_CRn, 8, 1) +#define OP_AT_S12E1R sys_insn(AT_Op0, 4, AT_CRn, 8, 4) +#define OP_AT_S12E1W sys_insn(AT_Op0, 4, AT_CRn, 8, 5) +#define OP_AT_S12E0R sys_insn(AT_Op0, 4, AT_CRn, 8, 6) +#define OP_AT_S12E0W sys_insn(AT_Op0, 4, AT_CRn, 8, 7) + /* TLBI instructions */ #define OP_TLBI_VMALLE1OS sys_insn(1, 0, 8, 1, 0) #define OP_TLBI_VAE1OS sys_insn(1, 0, 8, 1, 1)