From patchwork Tue Aug 8 13:34:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 13346058 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04E80C001DB for ; Tue, 8 Aug 2023 13:35:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rwx+vsL2LQ2yB4psofWysGAe0k1JikHvQ7yTP3VaTUQ=; b=v+94pOVafkIwju 0EWUF5V57upt1HiuM0q9/9c8gLX1lvpynHQMcaNw/mvBWJ6TaEwmh1Wdf5akv77NynXUezqaRBGuX j+H72clqlhhRbFcrad9k3xDoagvaiAkcPNVOpCYPqfERxRA2392QHtMo6SCtz4xhFsKLDFDaC9+72 w6ZBoGZjydbAHTkRwyjPFJbPDv+O4n4AcySbbNjdvcF22TEdvVDD6kkKBLJbFadYJsrowPOHAkAIl hLGmodRqz9OJiogwh/IDiP9Ki6M6B+hBh0QO76dGIJ2tSe+f1yjtRLFPBr+XnYdZa4Qr3OMWDcadG DoZzNgH5PA3jL+ztZcxQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qTMrp-002ej1-1f; Tue, 08 Aug 2023 13:35:21 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qTMri-002eg0-0C for linux-arm-kernel@lists.infradead.org; Tue, 08 Aug 2023 13:35:16 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 378DZ8SZ099655; Tue, 8 Aug 2023 08:35:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691501708; bh=T2Jvzug+TU1fil/sjwLWcwKegAlbi6xOz4QlTOH65sQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=NL9Wjm67dazDvj4yJyMEZnraPMCOZggb2Erm/Lwz/qPbL9LYdtF9gYJpb/oncxukm a/zL/+NYKGq/sY0z6gCVl5LQLbOMM7TzFikLgnhUBgXGR57KJ7PsDKx1mhRKkO1vS2 oJ9/X96kUtn+DEzt6YHfvEKX2bHzjBLZ9ZYvCsBg= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 378DZ8Oo004687 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 8 Aug 2023 08:35:08 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 8 Aug 2023 08:35:07 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 8 Aug 2023 08:35:07 -0500 Received: from fllv0039.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 378DZ4Pu053163; Tue, 8 Aug 2023 08:35:07 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dhruva Gole CC: , , , Andrew Davis Subject: [PATCH v2 04/13] arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level Date: Tue, 8 Aug 2023 08:34:48 -0500 Message-ID: <20230808133457.25060-5-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230808133457.25060-1-afd@ti.com> References: <20230808133457.25060-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230808_063514_202827_1A3B1FE1 X-CRM114-Status: GOOD ( 11.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information. As the attached OSPI device is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the OSPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 1 + arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 2 ++ arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 1 + 3 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index e26bd988e5224..6041862d5aa75 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -593,6 +593,7 @@ adc { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 7b1f94a89eca8..2c9c20a9d9179 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -295,6 +295,7 @@ ospi0: spi@47040000 { power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; ospi1: spi@47050000 { @@ -309,6 +310,7 @@ ospi1: spi@47050000 { power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index 734b051c97000..aac243bacfeea 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -530,6 +530,7 @@ &mcu_r5fss0_core1 { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;