From patchwork Tue Aug 8 17:12:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 13346509 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5128EC001B0 for ; Tue, 8 Aug 2023 17:15:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=QaPRS5P2ZKw4EPDAsC1kzLqLt3HSED9C+DNp7ZuaiK0=; b=rHXKcz+/7qfUNPB091EvEE0NBJ vAPcbZE1x9fMcPo6uTG42/XZQ55q/6Fja9REnmD9tiV7l0ncVQS52q9Lk6YIOZqbsRep+0nt3fwM+ QnlrXvTSlnsewqum6+vJ8qjxQPj3GI6lM5LofDMLjBxWN8N5GAv03zrgcBHXV6hfa4A3lPsYTqBMb pZ42w7XgHYU1idpdcnxW2mxlx4jQALhBpPkrgQzdPXqacO0GA+SXS7ZxDwk8Lb0BAzRAUV5htzsj+ cmeHQoUcrJTsdFcyeOZojGNekIgNpYvh1TvY0xLcO/Fyl8DbrA9a7bVzGC46nxsCG4O1HMZvwAwyD i6WF3WRw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qTQIj-003686-0e; Tue, 08 Aug 2023 17:15:21 +0000 Received: from mail-yw1-x1149.google.com ([2607:f8b0:4864:20::1149]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qTQId-003656-0j for linux-arm-kernel@lists.infradead.org; Tue, 08 Aug 2023 17:15:16 +0000 Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-58960b53007so20247447b3.3 for ; Tue, 08 Aug 2023 10:15:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1691514914; x=1692119714; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=fCG4B237jlLOlgd06dSBd3YRjuMxdikxPYPDrhwm5iw=; b=7C2lcn96rDD8uHyYxwlOuYSB6tJWNGn1sDDVV0eISte0YEVmg+BB/EDclewqkCypbk 2E3O+JjH3MYoC1zBEtoh/02QmkV6yQQFDvTnr9J4deVfvAEp9HmNeUDl+xW4mpSrilTp 2KIKs4IuGI2PysYkT1VrX1CLcb867IXsTdWuRy3scxRSjClA0vnfy5RO6Ad4Hw13GqqY bYkn67krN9aZhvErOVy84FixBNa4MIgTE1INV5kka2mZvqb3XeI88boYcRuHJY8RUlcZ UiWlVjXZZHErhjO5rKlZXVM7ZjsUbObp0I+yvvFC67IcAOhS5qBjNzYBSnR4L5CF6MxX VLBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691514914; x=1692119714; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=fCG4B237jlLOlgd06dSBd3YRjuMxdikxPYPDrhwm5iw=; b=HUCN5AC88sV3u+R1iPXfx7pfpzIlCNES4d448LRy3WEYjqY1crXzJ1yNnN1Nxj4OGM +HTgO6LwAhKSrkndtaiN19voV07yZADtLsCNfXGWwTHcpA4VVa8nGLtut0zCoaQ0mxre iSObzRfmMEjgejdq0oSHI0e99mSJkGJ1PMKfiIvS7MMYxam87/i6DatpFX4la2f5GaN5 7vVCAeOOhFi8RXyxutcyGgSl825ko81OH3YqN9o5YDiQaX+K+GFtXhDfrb2NwUi5RmU+ qSPZ3GBQQxhYG/hUCP9eD51NJ2izdsIDTiNoZpD11YherEYjaWbqWh9IDa7sXLOuxaNC 3YHg== X-Gm-Message-State: AOJu0Ywp4P+nLzhxzAHtRiicQCuKxXpu3MO3EDcX5nPsyheyBXaOnJ2X IQCpv0Cs6j9T9lYEclM2liqmxGxI6UBH X-Google-Smtp-Source: AGHT+IFGeT5c0NHUdPNrkQ55mUsPESfCUtj6//PDUdYu98m/zuJKM1UFdBQT/UoJ6wlhteXfP+Mk5ZXZe9Gw X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:986a:71d7:3b1e:ac1d]) (user=mshavit job=sendgmr) by 2002:a05:6902:690:b0:d46:45a1:b775 with SMTP id i16-20020a056902069000b00d4645a1b775mr3143ybt.3.1691514913790; Tue, 08 Aug 2023 10:15:13 -0700 (PDT) Date: Wed, 9 Aug 2023 01:12:00 +0800 In-Reply-To: <20230808171446.2187795-1-mshavit@google.com> Mime-Version: 1.0 References: <20230808171446.2187795-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.640.ga95def55d0-goog Message-ID: <20230809011204.v5.4.I5aa89c849228794a64146cfe86df21fb71629384@changeid> Subject: [PATCH v5 4/9] iommu/arm-smmu-v3: move stall_enabled to the cd table From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, Michael Shavit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230808_101515_281055_EDA65F59 X-CRM114-Status: GOOD ( 18.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org A domain can be attached to multiple masters with different master->stall_enabled values. The stall bit of a CD entry should follow master->stall_enabled and has an inverse relationship with the STE.S1STALLD bit. The stall_enabled bit does not depend on any property of the domain, so move it out of the arm_smmu_domain struct. Move it to the CD table struct so that it can fully describe how CD entries should be written to it. Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen Signed-off-by: Michael Shavit --- Changes in v5: - Reword commit Changes in v2: - Use a bitfield instead of a bool for stall_enabled drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 ++++---- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 3 ++- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index fe4b19c3b8dee..c01023404c26c 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1114,7 +1114,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid) | CTXDESC_CD_0_V; - if (smmu_domain->stall_enabled) + if (smmu_domain->cd_table.stall_enabled) val |= CTXDESC_CD_0_S; } @@ -1141,6 +1141,7 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain, struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; + cdcfg->stall_enabled = master->stall_enabled; cdcfg->max_cds_bits = master->ssid_bits; max_contexts = 1 << cdcfg->max_cds_bits; @@ -2121,8 +2122,6 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (ret) goto out_unlock; - smmu_domain->stall_enabled = master->stall_enabled; - ret = arm_smmu_alloc_cd_tables(smmu_domain, master); if (ret) goto out_free_asid; @@ -2461,7 +2460,8 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) ret = -EINVAL; goto out_unlock; } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && - smmu_domain->stall_enabled != master->stall_enabled) { + smmu_domain->cd_table.stall_enabled != + master->stall_enabled) { ret = -EINVAL; goto out_unlock; } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 35a93e8858872..05b1f0ee60808 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -597,6 +597,8 @@ struct arm_smmu_ctx_desc_cfg { unsigned int num_l1_ents; /* log2 of the maximum number of CDs supported by this table */ u8 max_cds_bits; + /* Whether CD entries in this table have the stall bit set. */ + u8 stall_enabled:1; }; struct arm_smmu_s2_cfg { @@ -714,7 +716,6 @@ struct arm_smmu_domain { struct mutex init_mutex; /* Protects smmu pointer */ struct io_pgtable_ops *pgtbl_ops; - bool stall_enabled; atomic_t nr_ats_masters; enum arm_smmu_domain_stage stage;