From patchwork Tue Aug 8 17:12:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 13346513 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 561B2C001B0 for ; Tue, 8 Aug 2023 17:16:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=SR+HE2EQnP3EO44Q1sEhUDS8h3BSgFCo7/brXEdV92M=; b=t5QTa33fuTUkxP/FobOMgICg1/ AJ8ddqp7Ngk37+heLzWh6dFnyVz6lq1YpyHwoJYMtg+8I9V4GQ4aGCeylBz87DVYgT0wsyec1MtNp fflqVSiLc/FY3/qdtiVGfMpX9AorihuCYD/7i9tvQ8LS0qEE5rSzGgJdyHz94FJ06WJfxBOCj03ri sRFTVdASQn62eIOoyiWKQOOSlw+2n9NahcsN3llzccMtE6w8YE9Dp9fUbYTa0Mqzk7EPszzu0tAJX LQ1aydpaYwGytl62JHAWuwgiT7PGOL4rveHxlQUFM8uTUevfBR/UW9UKG3f5kVA0TGI4KJCqYdt8h DTtIjQcw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qTQJ0-0036JB-2W; Tue, 08 Aug 2023 17:15:38 +0000 Received: from mail-yb1-xb4a.google.com ([2607:f8b0:4864:20::b4a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qTQIv-0036Er-1V for linux-arm-kernel@lists.infradead.org; Tue, 08 Aug 2023 17:15:35 +0000 Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-d074da73c3eso5390650276.3 for ; Tue, 08 Aug 2023 10:15:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1691514932; x=1692119732; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=ZlBD+7PvoDhg41jrKYyWEK7ci2zLxvyOU6AJgUoKm4s=; b=TW3Soan/UyVtkLj9e3V9TL2NG58JntRmwZpTDHKv4J0UIWtkuXX8+30rVtgte8dZcL ved2RpyB9O2fIul744OJ1qVY8UdXNCrH3I/4Mym81B+yuP3trruh6EveFEeonMrHFykG RUO9gPYZUfwloT6QWn3Mbe7xgHhqRtCGiPV1j/c9iR+IyOSKfVU2IAus8J/kXrqBTx+t u/E1oyf1KPdvV31T+JDzOkK+IF5htyYXed6nJfNTIQEAwtboiLOTx+rgwuUuz/BeyNE/ nCbLIkQL9jCq1ASoWVThVygeC96QTgEqRKIT5+2QViJO4GbMi0fo5tn2S7weNkNRbIOl 20/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691514932; x=1692119732; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=ZlBD+7PvoDhg41jrKYyWEK7ci2zLxvyOU6AJgUoKm4s=; b=QZGjjxjkmSEmSXSMzkZ9tFFnNUhurwzbvdac3FU2hGliFvFCRRMAkqZuCDo4o0sBjz U7CNeHx5JBlzTG/Laq4gMCaKEzHWabB1ncNeuDdRXDvtuKxU2WhoJ1r0XpbSNlv2zt4w vd6bIgiNSsmUv/UicnUSofrylKif+AAKR28ilFZ6HtV4HO6jFr+UHOO/OxBSXonN8zwr 1Z40QNfjC5lBVpk1LkgQhbOviBcxl4xdPJgdH7BO7IIGkIbjwrjzYo1mToJBC7FmvRYS 5ptIBVqO+GRbpG55Oh94iPILcG9MiV7vjll6UOfN5x2ROYm8C6TkDclEIw01LE7WJJNw aR2A== X-Gm-Message-State: AOJu0YwIOhcptT+iBXwS2/NlOgC7KeEfyTYIkXqW8EyWpvLnrvv/fwpv 8ye+MX4OE9oD9lKVbhtK5VIbOOrG8/J6 X-Google-Smtp-Source: AGHT+IFAXu3FH/zEWQzNGj/ih1neSthyomibWGyX08Oyjek2n/+brnMg9867DZUVuzOMgGo9SDKtkkw74MiE X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:986a:71d7:3b1e:ac1d]) (user=mshavit job=sendgmr) by 2002:a25:d24d:0:b0:d4d:564d:8fbf with SMTP id j74-20020a25d24d000000b00d4d564d8fbfmr3401ybg.13.1691514932248; Tue, 08 Aug 2023 10:15:32 -0700 (PDT) Date: Wed, 9 Aug 2023 01:12:04 +0800 In-Reply-To: <20230808171446.2187795-1-mshavit@google.com> Mime-Version: 1.0 References: <20230808171446.2187795-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.640.ga95def55d0-goog Message-ID: <20230809011204.v5.8.Idedc0f496231e2faab3df057219c5e2d937bbfe4@changeid> Subject: [PATCH v5 8/9] iommu/arm-smmu-v3: Skip cd sync if CD table isn't active From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, Michael Shavit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230808_101533_521213_D3838CDF X-CRM114-Status: GOOD ( 18.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This commit explicitly keeps track of whether a CD table is installed in an STE so that arm_smmu_sync_cd can skip the sync when unnecessary. This was previously achieved through the domain->devices list, but we are moving to a model where arm_smmu_sync_cd directly operates on a master and the master's CD table instead of a domain. Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen Signed-off-by: Michael Shavit --- Changes in v5: - Fix an issue where cd_table.installed wasn't correctly updated. Changes in v3: - Flip the cd_table.installed bit back off when table is detached - re-order the commit later in the series since flipping the installed bit to off isn't obvious when the cd_table is still shared by multiple masters. Changes in v2: - Store field as a bit instead of a bool. Fix comment about STE being live before the sync in write_ctx_desc(). drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 9 ++++++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 ++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index f5ad386cc8760..488d12dd2d4aa 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -985,6 +985,9 @@ static void arm_smmu_sync_cd(struct arm_smmu_master *master, }, }; + if (!master->cd_table.installed) + return; + cmds.num = 0; for (i = 0; i < master->num_streams; i++) { cmd.cfgi.sid = master->streams[i].id; @@ -1091,7 +1094,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_master *master, int ssid, cdptr[3] = cpu_to_le64(cd->mair); /* - * STE is live, and the SMMU might read dwords of this CD in any + * STE may be live, and the SMMU might read dwords of this CD in any * order. Ensure that it observes valid values before reading * V=1. */ @@ -1333,6 +1336,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, */ if (smmu) arm_smmu_sync_ste_for_sid(smmu, sid); + master->cd_table.installed = false; return; } @@ -1360,6 +1364,9 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, cd_table->l1_desc ? STRTAB_STE_0_S1FMT_64K_L2 : STRTAB_STE_0_S1FMT_LINEAR); + cd_table->installed = true; + } else { + master->cd_table.installed = false; } if (s2_cfg) { diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 1f3b370257779..e76452e735a04 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -599,6 +599,8 @@ struct arm_smmu_ctx_desc_cfg { u8 max_cds_bits; /* Whether CD entries in this table have the stall bit set. */ u8 stall_enabled:1; + /* Whether this CD table is installed in any STE */ + u8 installed:1; }; struct arm_smmu_s2_cfg {