| Message ID | 20230810001320.626744-1-marex@denx.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: imx8mp: Improve VPU clock configuration | expand |
On Wed, Aug 9, 2023 at 7:13 PM Marek Vasut <marex@denx.de> wrote: > > Update VPU clock according to reference manual to improve performance. > i.MX 8M Plus Applications Processor Reference Manual, Rev. 1, 06/2021 > > Table 5-1. Clock Root Table (continued) reads as follows: > Clock Root ............... Max Freq (MHz) > VPU_BUS_CLK_ROOT ......... 800 > VPU_G1_CLK_ROOT .......... 800 > VPU_G2_CLK_ROOT .......... 700 > > 5.1.5.1 Input Clocks > Input Clock .............. Frequency (MHz) > VPU_PLL_CLK .............. 800 > > The VPU G1 and VPU bus is now supplied from PLL1 which provides 800 MHz > on one of its outputs, the VPU G2 is supplied from VPU PLL with 700 MHz > which is a perfect fit for this setup. This also matches the NXP kernel > fork configuration. > > Signed-off-by: Marek Vasut <marex@denx.de> LGTM. Reviewed-by: Adam Ford <aford173@gmail.com> adam > --- > Cc: Adam Ford <aford173@gmail.com> > Cc: Alexander Stein <alexander.stein@ew.tq-group.com> > Cc: Conor Dooley <conor+dt@kernel.org> > Cc: Fabio Estevam <festevam@gmail.com> > Cc: Frank Li <Frank.Li@nxp.com> > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > Cc: Lucas Stach <l.stach@pengutronix.de> > Cc: Marek Vasut <marex@denx.de> > Cc: NXP Linux Team <linux-imx@nxp.com> > Cc: Peng Fan <peng.fan@nxp.com> > Cc: Pengutronix Kernel Team <kernel@pengutronix.de> > Cc: Richard Cochran <richardcochran@gmail.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Sascha Hauer <s.hauer@pengutronix.de> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: devicetree@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > index 6f2f50e1639c3..77974bd6da63a 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -1928,8 +1928,8 @@ vpu_g1: video-codec@38300000 { > interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>; > assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>; > - assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; > - assigned-clock-rates = <600000000>; > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; > + assigned-clock-rates = <800000000>; > power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>; > }; > > @@ -1939,8 +1939,8 @@ vpu_g2: video-codec@38310000 { > interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>; > assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>; > - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>; > - assigned-clock-rates = <500000000>; > + assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; > + assigned-clock-rates = <700000000>; > power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>; > }; > > @@ -1956,8 +1956,8 @@ vpumix_blk_ctrl: blk-ctrl@38330000 { > <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; > clock-names = "g1", "g2", "vc8000e"; > assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>, <&clk IMX8MP_VPU_PLL>; > - assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; > - assigned-clock-rates = <600000000>, <600000000>; > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; > + assigned-clock-rates = <800000000>, <700000000>; > interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>, > <&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>, > <&noc IMX8MP_ICM_VPU_H1 &noc IMX8MP_ICN_VIDEO>; > -- > 2.40.1 >
Hi Marek, On 23-08-10, Marek Vasut wrote: > Update VPU clock according to reference manual to improve performance. > i.MX 8M Plus Applications Processor Reference Manual, Rev. 1, 06/2021 > > Table 5-1. Clock Root Table (continued) reads as follows: > Clock Root ............... Max Freq (MHz) > VPU_BUS_CLK_ROOT ......... 800 > VPU_G1_CLK_ROOT .......... 800 > VPU_G2_CLK_ROOT .......... 700 > > 5.1.5.1 Input Clocks > Input Clock .............. Frequency (MHz) > VPU_PLL_CLK .............. 800 Acoording the datasheet not the reference manual, this would be the overdrive mode now. Can we ensure that VDD_SOC is in overdrive state? Regards, Marco > The VPU G1 and VPU bus is now supplied from PLL1 which provides 800 MHz > on one of its outputs, the VPU G2 is supplied from VPU PLL with 700 MHz > which is a perfect fit for this setup. This also matches the NXP kernel > fork configuration. > > Signed-off-by: Marek Vasut <marex@denx.de> > --- > Cc: Adam Ford <aford173@gmail.com> > Cc: Alexander Stein <alexander.stein@ew.tq-group.com> > Cc: Conor Dooley <conor+dt@kernel.org> > Cc: Fabio Estevam <festevam@gmail.com> > Cc: Frank Li <Frank.Li@nxp.com> > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > Cc: Lucas Stach <l.stach@pengutronix.de> > Cc: Marek Vasut <marex@denx.de> > Cc: NXP Linux Team <linux-imx@nxp.com> > Cc: Peng Fan <peng.fan@nxp.com> > Cc: Pengutronix Kernel Team <kernel@pengutronix.de> > Cc: Richard Cochran <richardcochran@gmail.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Sascha Hauer <s.hauer@pengutronix.de> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: devicetree@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > index 6f2f50e1639c3..77974bd6da63a 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -1928,8 +1928,8 @@ vpu_g1: video-codec@38300000 { > interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>; > assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>; > - assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; > - assigned-clock-rates = <600000000>; > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; > + assigned-clock-rates = <800000000>; > power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>; > }; > > @@ -1939,8 +1939,8 @@ vpu_g2: video-codec@38310000 { > interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>; > assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>; > - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>; > - assigned-clock-rates = <500000000>; > + assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; > + assigned-clock-rates = <700000000>; > power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>; > }; > > @@ -1956,8 +1956,8 @@ vpumix_blk_ctrl: blk-ctrl@38330000 { > <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; > clock-names = "g1", "g2", "vc8000e"; > assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>, <&clk IMX8MP_VPU_PLL>; > - assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; > - assigned-clock-rates = <600000000>, <600000000>; > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; > + assigned-clock-rates = <800000000>, <700000000>; > interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>, > <&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>, > <&noc IMX8MP_ICM_VPU_H1 &noc IMX8MP_ICN_VIDEO>; > -- > 2.40.1 > > >
On Thu, Aug 10, 2023 at 2:42 AM Marco Felsch <m.felsch@pengutronix.de> wrote: > > Hi Marek, > > On 23-08-10, Marek Vasut wrote: > > Update VPU clock according to reference manual to improve performance. > > i.MX 8M Plus Applications Processor Reference Manual, Rev. 1, 06/2021 > > > > Table 5-1. Clock Root Table (continued) reads as follows: > > Clock Root ............... Max Freq (MHz) > > VPU_BUS_CLK_ROOT ......... 800 > > VPU_G1_CLK_ROOT .......... 800 > > VPU_G2_CLK_ROOT .......... 700 > > > > 5.1.5.1 Input Clocks > > Input Clock .............. Frequency (MHz) > > VPU_PLL_CLK .............. 800 > > Acoording the datasheet not the reference manual, this would be the > overdrive mode now. Can we ensure that VDD_SOC is in overdrive state? Shoot, I explicitly searched the TRM for overdrive, because I remember this coming before with either the 8MQ or 8MM, but I couldn't remember. I forgot all about the actual datasheet. The operating-points for the various voltage rails would have to increase to get this into overdrive mode. I think this would have to be done on a per-board basis if memory serves when this came up before. :-( adam > > Regards, > Marco > > > The VPU G1 and VPU bus is now supplied from PLL1 which provides 800 MHz > > on one of its outputs, the VPU G2 is supplied from VPU PLL with 700 MHz > > which is a perfect fit for this setup. This also matches the NXP kernel > > fork configuration. > > > > Signed-off-by: Marek Vasut <marex@denx.de> > > --- > > Cc: Adam Ford <aford173@gmail.com> > > Cc: Alexander Stein <alexander.stein@ew.tq-group.com> > > Cc: Conor Dooley <conor+dt@kernel.org> > > Cc: Fabio Estevam <festevam@gmail.com> > > Cc: Frank Li <Frank.Li@nxp.com> > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> > > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > Cc: Lucas Stach <l.stach@pengutronix.de> > > Cc: Marek Vasut <marex@denx.de> > > Cc: NXP Linux Team <linux-imx@nxp.com> > > Cc: Peng Fan <peng.fan@nxp.com> > > Cc: Pengutronix Kernel Team <kernel@pengutronix.de> > > Cc: Richard Cochran <richardcochran@gmail.com> > > Cc: Rob Herring <robh+dt@kernel.org> > > Cc: Sascha Hauer <s.hauer@pengutronix.de> > > Cc: Shawn Guo <shawnguo@kernel.org> > > Cc: devicetree@vger.kernel.org > > Cc: linux-arm-kernel@lists.infradead.org > > --- > > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++++------ > > 1 file changed, 6 insertions(+), 6 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > index 6f2f50e1639c3..77974bd6da63a 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > @@ -1928,8 +1928,8 @@ vpu_g1: video-codec@38300000 { > > interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; > > clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>; > > assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>; > > - assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; > > - assigned-clock-rates = <600000000>; > > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; > > + assigned-clock-rates = <800000000>; > > power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>; > > }; > > > > @@ -1939,8 +1939,8 @@ vpu_g2: video-codec@38310000 { > > interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; > > clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>; > > assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>; > > - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>; > > - assigned-clock-rates = <500000000>; > > + assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; > > + assigned-clock-rates = <700000000>; > > power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>; > > }; > > > > @@ -1956,8 +1956,8 @@ vpumix_blk_ctrl: blk-ctrl@38330000 { > > <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; > > clock-names = "g1", "g2", "vc8000e"; > > assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>, <&clk IMX8MP_VPU_PLL>; > > - assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; > > - assigned-clock-rates = <600000000>, <600000000>; > > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; > > + assigned-clock-rates = <800000000>, <700000000>; > > interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>, > > <&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>, > > <&noc IMX8MP_ICM_VPU_H1 &noc IMX8MP_ICN_VIDEO>; > > -- > > 2.40.1 > > > > > >
On 8/10/23 14:46, Adam Ford wrote: > On Thu, Aug 10, 2023 at 2:42 AM Marco Felsch <m.felsch@pengutronix.de> wrote: >> >> Hi Marek, >> >> On 23-08-10, Marek Vasut wrote: >>> Update VPU clock according to reference manual to improve performance. >>> i.MX 8M Plus Applications Processor Reference Manual, Rev. 1, 06/2021 >>> >>> Table 5-1. Clock Root Table (continued) reads as follows: >>> Clock Root ............... Max Freq (MHz) >>> VPU_BUS_CLK_ROOT ......... 800 >>> VPU_G1_CLK_ROOT .......... 800 >>> VPU_G2_CLK_ROOT .......... 700 >>> >>> 5.1.5.1 Input Clocks >>> Input Clock .............. Frequency (MHz) >>> VPU_PLL_CLK .............. 800 >> >> Acoording the datasheet not the reference manual, this would be the >> overdrive mode now. Can we ensure that VDD_SOC is in overdrive state? > > Shoot, I explicitly searched the TRM for overdrive, because I remember > this coming before with either the 8MQ or 8MM, but I couldn't > remember. I forgot all about the actual datasheet. Same here, I vaguely recall there might've been a reason why those lower freqs, but I couldn't find it either. > The operating-points for the various voltage rails would have to > increase to get this into overdrive mode. I think this would have to > be done on a per-board basis if memory serves when this came up > before. :-( I don't mind doing it per board. Actually, I don't mind dropping this patch, since the decoding performance increase is not even an issue in any of the use cases I care about. I guess the general agreement here is to go with the "nominal mode" by default and enable "overdrive mode" per-board , while the NXP downstream goes full "overdrive mode" all the time ?
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 6f2f50e1639c3..77974bd6da63a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1928,8 +1928,8 @@ vpu_g1: video-codec@38300000 { interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>; assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>; - assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; - assigned-clock-rates = <600000000>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; + assigned-clock-rates = <800000000>; power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G1>; }; @@ -1939,8 +1939,8 @@ vpu_g2: video-codec@38310000 { interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>; assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>; - assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>; - assigned-clock-rates = <500000000>; + assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; + assigned-clock-rates = <700000000>; power-domains = <&vpumix_blk_ctrl IMX8MP_VPUBLK_PD_G2>; }; @@ -1956,8 +1956,8 @@ vpumix_blk_ctrl: blk-ctrl@38330000 { <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; clock-names = "g1", "g2", "vc8000e"; assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>, <&clk IMX8MP_VPU_PLL>; - assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>; - assigned-clock-rates = <600000000>, <600000000>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; + assigned-clock-rates = <800000000>, <700000000>; interconnects = <&noc IMX8MP_ICM_VPU_G1 &noc IMX8MP_ICN_VIDEO>, <&noc IMX8MP_ICM_VPU_G2 &noc IMX8MP_ICN_VIDEO>, <&noc IMX8MP_ICM_VPU_H1 &noc IMX8MP_ICN_VIDEO>;
Update VPU clock according to reference manual to improve performance. i.MX 8M Plus Applications Processor Reference Manual, Rev. 1, 06/2021 Table 5-1. Clock Root Table (continued) reads as follows: Clock Root ............... Max Freq (MHz) VPU_BUS_CLK_ROOT ......... 800 VPU_G1_CLK_ROOT .......... 800 VPU_G2_CLK_ROOT .......... 700 5.1.5.1 Input Clocks Input Clock .............. Frequency (MHz) VPU_PLL_CLK .............. 800 The VPU G1 and VPU bus is now supplied from PLL1 which provides 800 MHz on one of its outputs, the VPU G2 is supplied from VPU PLL with 700 MHz which is a perfect fit for this setup. This also matches the NXP kernel fork configuration. Signed-off-by: Marek Vasut <marex@denx.de> --- Cc: Adam Ford <aford173@gmail.com> Cc: Alexander Stein <alexander.stein@ew.tq-group.com> Cc: Conor Dooley <conor+dt@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: Frank Li <Frank.Li@nxp.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Marek Vasut <marex@denx.de> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Richard Cochran <richardcochran@gmail.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)