From patchwork Thu Aug 10 00:38:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 13348654 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3629AC001E0 for ; Thu, 10 Aug 2023 00:39:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rwx+vsL2LQ2yB4psofWysGAe0k1JikHvQ7yTP3VaTUQ=; b=b8HX7SFH3oc1yv og0ccIy4LQYS7bZfFpbx+UxsazQBdEy2K4eAuzL1Ao1ZgitP6eA5o5m8+kE/u8jtJTTrc7l9h0XOd h0UOD/It/wnfsJH09v6GBVr/30iSs1TKFE/IObvmVHMzMMeujRM5zh4s3y3XQaJHhYUMk0W16Cb+I Ov6moxH7BqtpdetLLOhClJgaw04kmpimXeSarkOZJFFMYUk8NS6dwvMaNXOV/6nlMYXBIXugA4v4e KOaB6stR0WqTm5KcJZNoCo3xhMRuCsV0yg0ZMP4t+/Kgz9Fb5geazp6dKS0m69NcJEWf3GIfWHAWK TILQcX2wQICm5doga2gw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qTthX-006Bgl-3B; Thu, 10 Aug 2023 00:38:55 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qTth6-006BPy-26 for linux-arm-kernel@lists.infradead.org; Thu, 10 Aug 2023 00:38:33 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 37A0cKHb018337; Wed, 9 Aug 2023 19:38:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691627900; bh=T2Jvzug+TU1fil/sjwLWcwKegAlbi6xOz4QlTOH65sQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=e3zucApvhzeapjM23v7sgJ7rbbnpiWRL0E53fJCTfFwmsmFejKWh4LKbY+8aN/UNX 6DmNRyybtIjXax3EBc3g7EtUdRBILE1syEGfJaKZb8Fr8bJaR1AukOVPHswtq/K6f6 IbQ0DIId+8yNU7pj8gTfVSyd9kGAt37gK10JPy4I= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 37A0cKMs061486 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Aug 2023 19:38:20 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 9 Aug 2023 19:38:19 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Aug 2023 19:38:19 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 37A0cGF7014775; Wed, 9 Aug 2023 19:38:19 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dhruva Gole CC: , , , Andrew Davis Subject: [PATCH v3 04/13] arm64: dts: ti: k3-am65: Enable OSPI nodes at the board level Date: Wed, 9 Aug 2023 19:38:05 -0500 Message-ID: <20230810003814.85450-5-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230810003814.85450-1-afd@ti.com> References: <20230810003814.85450-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230809_173828_805488_145008C2 X-CRM114-Status: GOOD ( 12.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and device information. As the attached OSPI device is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the OSPI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 1 + arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 2 ++ arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 1 + 3 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index e26bd988e5224..6041862d5aa75 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -593,6 +593,7 @@ adc { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 7b1f94a89eca8..2c9c20a9d9179 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -295,6 +295,7 @@ ospi0: spi@47040000 { power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; ospi1: spi@47050000 { @@ -309,6 +310,7 @@ ospi1: spi@47050000 { power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index 734b051c97000..aac243bacfeea 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -530,6 +530,7 @@ &mcu_r5fss0_core1 { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;