diff mbox series

soc: imx8m: Enable OCOTP clock for imx8mm before reading registers

Message ID 20230814015700.70156-1-nathan@nathanrossi.com (mailing list archive)
State New, archived
Headers show
Series soc: imx8m: Enable OCOTP clock for imx8mm before reading registers | expand

Commit Message

Nathan Rossi Aug. 14, 2023, 1:57 a.m. UTC
From: Nathan Rossi <nathan.rossi@digi.com>

Commit 836fb30949d9 ("soc: imx8m: Enable OCOTP clock before reading the
register") added configuration to enable the OCOTP clock before
attempting to read from the associated registers.

This same kexec issue is present with the imx8m SoCs that use the
imx8mm_soc_uid function (e.g. imx8mp). This requires the imx8mm_soc_uid
function to configure the OCOTP clock before accessing the associated
registers. This change implements the same clock enable functionality
that is present in the imx8mq_soc_revision function for the
imx8mm_soc_uid function.

Signed-off-by: Nathan Rossi <nathan.rossi@digi.com>
---
 drivers/soc/imx/soc-imx8m.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

---
2.40.1

Comments

Nathan Rossi Sept. 18, 2023, 2:20 a.m. UTC | #1
On Mon, 14 Aug 2023 at 11:57, Nathan Rossi <nathan@nathanrossi.com> wrote:
>
> From: Nathan Rossi <nathan.rossi@digi.com>
>
> Commit 836fb30949d9 ("soc: imx8m: Enable OCOTP clock before reading the
> register") added configuration to enable the OCOTP clock before
> attempting to read from the associated registers.
>
> This same kexec issue is present with the imx8m SoCs that use the
> imx8mm_soc_uid function (e.g. imx8mp). This requires the imx8mm_soc_uid
> function to configure the OCOTP clock before accessing the associated
> registers. This change implements the same clock enable functionality
> that is present in the imx8mq_soc_revision function for the
> imx8mm_soc_uid function.

Gentle ping. Are there any comments or feedback on this change?

Thanks,
Nathan

>
> Signed-off-by: Nathan Rossi <nathan.rossi@digi.com>
> ---
>  drivers/soc/imx/soc-imx8m.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c
> index 1dcd243df5..ec87d9d878 100644
> --- a/drivers/soc/imx/soc-imx8m.c
> +++ b/drivers/soc/imx/soc-imx8m.c
> @@ -100,6 +100,7 @@ static void __init imx8mm_soc_uid(void)
>  {
>         void __iomem *ocotp_base;
>         struct device_node *np;
> +       struct clk *clk;
>         u32 offset = of_machine_is_compatible("fsl,imx8mp") ?
>                      IMX8MP_OCOTP_UID_OFFSET : 0;
>
> @@ -109,11 +110,20 @@ static void __init imx8mm_soc_uid(void)
>
>         ocotp_base = of_iomap(np, 0);
>         WARN_ON(!ocotp_base);
> +       clk = of_clk_get_by_name(np, NULL);
> +       if (IS_ERR(clk)) {
> +               WARN_ON(IS_ERR(clk));
> +               return;
> +       }
> +
> +       clk_prepare_enable(clk);
>
>         soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset);
>         soc_uid <<= 32;
>         soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset);
>
> +       clk_disable_unprepare(clk);
> +       clk_put(clk);
>         iounmap(ocotp_base);
>         of_node_put(np);
>  }
> ---
> 2.40.1
Fabio Estevam Sept. 18, 2023, 3:26 a.m. UTC | #2
Hi Nathan,

On Sun, Aug 13, 2023 at 10:57 PM Nathan Rossi <nathan@nathanrossi.com> wrote:
>
> From: Nathan Rossi <nathan.rossi@digi.com>
>
> Commit 836fb30949d9 ("soc: imx8m: Enable OCOTP clock before reading the
> register") added configuration to enable the OCOTP clock before
> attempting to read from the associated registers.
>
> This same kexec issue is present with the imx8m SoCs that use the
> imx8mm_soc_uid function (e.g. imx8mp). This requires the imx8mm_soc_uid
> function to configure the OCOTP clock before accessing the associated
> registers. This change implements the same clock enable functionality
> that is present in the imx8mq_soc_revision function for the
> imx8mm_soc_uid function.
>
> Signed-off-by: Nathan Rossi <nathan.rossi@digi.com>

Thanks for the fix:

Reviewed-by: Fabio Estevam <festevam@gmail.com>

Should it also have a Fixes tag?
Nathan Rossi Sept. 18, 2023, 5:46 a.m. UTC | #3
On Mon, 18 Sept 2023 at 13:26, Fabio Estevam <festevam@gmail.com> wrote:
>
> Hi Nathan,
>
> On Sun, Aug 13, 2023 at 10:57 PM Nathan Rossi <nathan@nathanrossi.com> wrote:
> >
> > From: Nathan Rossi <nathan.rossi@digi.com>
> >
> > Commit 836fb30949d9 ("soc: imx8m: Enable OCOTP clock before reading the
> > register") added configuration to enable the OCOTP clock before
> > attempting to read from the associated registers.
> >
> > This same kexec issue is present with the imx8m SoCs that use the
> > imx8mm_soc_uid function (e.g. imx8mp). This requires the imx8mm_soc_uid
> > function to configure the OCOTP clock before accessing the associated
> > registers. This change implements the same clock enable functionality
> > that is present in the imx8mq_soc_revision function for the
> > imx8mm_soc_uid function.
> >
> > Signed-off-by: Nathan Rossi <nathan.rossi@digi.com>
>
> Thanks for the fix:
>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
>
> Should it also have a Fixes tag?

Potentially, though none of the previous commits (or their referenced
commits) attempted to resolve the issue for the imx8mm_soc_uid
function so I was not sure if a fixes would apply in this case or to
which commit? Though with that said this change would only need to be
applied to kernels that have applied the referenced commit, so that is
probably the ideal target for the fixes. I can send a v2 with the
Fixes included? Otherwise I have included the specific fixes commit
information below.

Fixes: 836fb30949d9 ("soc: imx8m: Enable OCOTP clock before reading
the register")

Thanks,
Nathan
Shawn Guo Sept. 24, 2023, 12:51 p.m. UTC | #4
On Mon, Aug 14, 2023 at 01:57:00AM +0000, Nathan Rossi wrote:
> From: Nathan Rossi <nathan.rossi@digi.com>
> 
> Commit 836fb30949d9 ("soc: imx8m: Enable OCOTP clock before reading the
> register") added configuration to enable the OCOTP clock before
> attempting to read from the associated registers.
> 
> This same kexec issue is present with the imx8m SoCs that use the
> imx8mm_soc_uid function (e.g. imx8mp). This requires the imx8mm_soc_uid
> function to configure the OCOTP clock before accessing the associated
> registers. This change implements the same clock enable functionality
> that is present in the imx8mq_soc_revision function for the
> imx8mm_soc_uid function.
> 
> Signed-off-by: Nathan Rossi <nathan.rossi@digi.com>

Applied, thanks!
diff mbox series

Patch

diff --git a/drivers/soc/imx/soc-imx8m.c b/drivers/soc/imx/soc-imx8m.c
index 1dcd243df5..ec87d9d878 100644
--- a/drivers/soc/imx/soc-imx8m.c
+++ b/drivers/soc/imx/soc-imx8m.c
@@ -100,6 +100,7 @@  static void __init imx8mm_soc_uid(void)
 {
 	void __iomem *ocotp_base;
 	struct device_node *np;
+	struct clk *clk;
 	u32 offset = of_machine_is_compatible("fsl,imx8mp") ?
 		     IMX8MP_OCOTP_UID_OFFSET : 0;
 
@@ -109,11 +110,20 @@  static void __init imx8mm_soc_uid(void)
 
 	ocotp_base = of_iomap(np, 0);
 	WARN_ON(!ocotp_base);
+	clk = of_clk_get_by_name(np, NULL);
+	if (IS_ERR(clk)) {
+		WARN_ON(IS_ERR(clk));
+		return;
+	}
+
+	clk_prepare_enable(clk);
 
 	soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset);
 	soc_uid <<= 32;
 	soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset);
 
+	clk_disable_unprepare(clk);
+	clk_put(clk);
 	iounmap(ocotp_base);
 	of_node_put(np);
 }