From patchwork Mon Aug 21 21:22:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jing Zhang X-Patchwork-Id: 13359834 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 829BFEE49A5 for ; Mon, 21 Aug 2023 21:23:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=KY+i8BYao0R0RRABBpSbBcUS22sh+JSGZmvpQIILLCk=; b=CoVhxKb9ywY8KZuchJ1S1KyVyc y1dVCjU60UdrY6v4ZqU8qqSyhyzTL+xBfUOyinC4/lXgsUjZxmuneEceMgGGhW4OtivgQTHJR+oUF Pp9H/Fl8kqs2JAsVyM+qvyEotLfvz5RvDEWzUeK0VZqKw5i0ia9o7Mr1KjaeKQmZtviprUna4DEEb tyWK3nkRTHSWkKKS9IvXuDx5DB2LiJvd9VY1M8AmShhSEpdaPaI2tX0NKxmEsGbHh0QVbkM90GgiZ vE98hJ+yd/Mggh+WCZIUMSlxi52+4iyrrVEZC+1KY2fOMWoPEiEA3ruBdf7hU3e4S3zdyz6+t3vA4 +cccDMcQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qYCMs-00EiRX-04; Mon, 21 Aug 2023 21:23:22 +0000 Received: from mail-yb1-xb4a.google.com ([2607:f8b0:4864:20::b4a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qYCMb-00EiIw-2z for linux-arm-kernel@lists.infradead.org; Mon, 21 Aug 2023 21:23:07 +0000 Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-d746edab033so4885135276.0 for ; Mon, 21 Aug 2023 14:23:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1692652982; x=1693257782; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=ZZNW6XiNIf4mfjw9nbhS/bawdb727WcU0dp8aEgn/JY=; b=mfZ8T+vJQqkinKwOsLzTgieqjlDTtmMJPhiIg1UCejUhjc9rHbi12nHrBX1P8R+La1 On1VG+8ZZPt9lU0WEOUK6Hhqm7oUHN3uX9k7gKeoKcYZqRQarrkaKugZ+N3u0zR1NqeF qKUJdOWiOl7c1ntFEpmGr0DZ4k3fUFFTwFJ7AwFIjMbyNNsPqdCcMezkrnEzRErgVfwk vrAeVlG3W9apImp2c4JOGe0cjEog9XiPDnb0fCQ5GiDtCb4wob39UHoE7iFPG+Vo19sS ULFHcNVrjQgS3eIQQq+qWnfIuvrkUaYPkW+Y5RPIC0SbNZHS8AWRIqwMP7EgiznJNWSd mqOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692652982; x=1693257782; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=ZZNW6XiNIf4mfjw9nbhS/bawdb727WcU0dp8aEgn/JY=; b=CZfhXM8EiRCv6zhPuDpEXIlPhcEQWw9aEUb25Q9+7KN1C4gmp7RbPVfpfh9uk6N49E enhkAj8QK1auQ7+ZM5SBtDpIsPGo5sSQKoT1akIDkdVWzGh2xJ+JqJt5cx5axG1/LrvI g76pxIATU83mJ8Tv3beW+mAlwv7mrd8mJmS8tPXMCQOwN+z/urADwKwJVuH7GTPU7KBT h04Xex/xHcK9cmsON6sFgFKswZtrv29ZVG4X3YIv4rgDA6v3GCRcxqOzFVwBdRRDCPw+ Hw2MYdLioV6j9qCtxQYP0c2NZO2aF9gji1U562s/A1nCMbmM3+1e2HiAEF7ZgWYN8Loa SIMg== X-Gm-Message-State: AOJu0YwWbm71WU6UQ3QAhtuLRTgIkEMgqF/sLq9Fx1IDiqIf6Xj+Kfte 97WtXRbcmZxEK18HDQAbLp3yP1CyUffoBToVjA== X-Google-Smtp-Source: AGHT+IFcZHBQjtL3hf7b721U36jM/7oR8Bwys7GsW5mF8z+GNPV4bnU+CLhfQcjsqC+23yxApD2ljTpBXI1NF/Etiw== X-Received: from jgzg.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1acf]) (user=jingzhangos job=sendgmr) by 2002:a25:d3cd:0:b0:d64:9e2c:5c0d with SMTP id e196-20020a25d3cd000000b00d649e2c5c0dmr98945ybf.5.1692652981963; Mon, 21 Aug 2023 14:23:01 -0700 (PDT) Date: Mon, 21 Aug 2023 14:22:40 -0700 In-Reply-To: <20230821212243.491660-1-jingzhangos@google.com> Mime-Version: 1.0 References: <20230821212243.491660-1-jingzhangos@google.com> X-Mailer: git-send-email 2.42.0.rc1.204.g551eb34607-goog Message-ID: <20230821212243.491660-9-jingzhangos@google.com> Subject: [PATCH v9 08/11] KVM: arm64: Refactor helper Macros for idreg desc From: Jing Zhang To: KVM , KVMARM , ARMLinux , Marc Zyngier , Oliver Upton Cc: Will Deacon , Paolo Bonzini , James Morse , Alexandru Elisei , Suzuki K Poulose , Fuad Tabba , Reiji Watanabe , Raghavendra Rao Ananta , Suraj Jitindar Singh , Cornelia Huck , Shaoqin Huang , Jing Zhang X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230821_142305_968306_C0FDFC5C X-CRM114-Status: GOOD ( 13.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add some helpers to ease the declaration for idreg desc. These Macros will be heavily used for future commits enabling writable for idregs. Signed-off-by: Jing Zhang --- arch/arm64/kvm/sys_regs.c | 82 +++++++++++++++++---------------------- 1 file changed, 36 insertions(+), 46 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index bf716f646872..44d164d47756 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1844,27 +1844,37 @@ static unsigned int elx2_visibility(const struct kvm_vcpu *vcpu, * from userspace. */ -/* sys_reg_desc initialiser for known cpufeature ID registers */ -#define ID_SANITISED(name) { \ - SYS_DESC(SYS_##name), \ - .access = access_id_reg, \ - .get_user = get_id_reg, \ - .set_user = set_id_reg, \ - .visibility = id_visibility, \ - .reset = kvm_read_sanitised_id_reg, \ - .val = 0, \ +#define ID_DESC(name, _set_user, _visibility, _reset, mask) { \ + SYS_DESC(SYS_##name), \ + .access = access_id_reg, \ + .get_user = get_id_reg, \ + .set_user = _set_user, \ + .visibility = _visibility, \ + .reset = _reset, \ + .val = mask, \ } /* sys_reg_desc initialiser for known cpufeature ID registers */ -#define AA32_ID_SANITISED(name) { \ - SYS_DESC(SYS_##name), \ - .access = access_id_reg, \ - .get_user = get_id_reg, \ - .set_user = set_id_reg, \ - .visibility = aa32_id_visibility, \ - .reset = kvm_read_sanitised_id_reg, \ - .val = 0, \ -} +#define _ID_SANITISED(name, _set_user, _reset) \ + ID_DESC(name, _set_user, id_visibility, _reset, 0) +#define ID_SANITISED(name) \ + _ID_SANITISED(name, set_id_reg, kvm_read_sanitised_id_reg) + +#define _ID_SANITISED_W(name, _set_user, _reset, mask) \ + ID_DESC(name, _set_user, id_visibility, _reset, mask) +#define ID_SANITISED_W(name, mask) \ + _ID_SANITISED_W(name, set_id_reg, kvm_read_sanitised_id_reg, mask) + +/* sys_reg_desc initialiser for known cpufeature ID registers */ +#define _AA32_ID_SANITISED(name, _set_user, _reset) \ + ID_DESC(name, _set_user, aa32_id_visibility, _reset, 0) +#define AA32_ID_SANITISED(name) \ + _AA32_ID_SANITISED(name, set_id_reg, kvm_read_sanitised_id_reg) + +#define _AA32_ID_SANITISED_W(name, _set_user, _reset, mask) \ + ID_DESC(name, _set_user, aa32_id_visibility, _reset, mask) +#define AA32_ID_SANITISED_W(name, mask) \ + _AA32_ID_SANITISED_W(name, set_id_reg, kvm_read_sanitised_id_reg, mask) /* * sys_reg_desc initialiser for architecturally unallocated cpufeature ID @@ -1886,15 +1896,8 @@ static unsigned int elx2_visibility(const struct kvm_vcpu *vcpu, * For now, these are exposed just like unallocated ID regs: they appear * RAZ for the guest. */ -#define ID_HIDDEN(name) { \ - SYS_DESC(SYS_##name), \ - .access = access_id_reg, \ - .get_user = get_id_reg, \ - .set_user = set_id_reg, \ - .visibility = raz_visibility, \ - .reset = kvm_read_sanitised_id_reg, \ - .val = 0, \ -} +#define ID_HIDDEN(name) \ + ID_DESC(name, set_id_reg, raz_visibility, kvm_read_sanitised_id_reg, 0) static bool access_sp_el1(struct kvm_vcpu *vcpu, struct sys_reg_params *p, @@ -2003,13 +2006,8 @@ static const struct sys_reg_desc sys_reg_descs[] = { /* CRm=1 */ AA32_ID_SANITISED(ID_PFR0_EL1), AA32_ID_SANITISED(ID_PFR1_EL1), - { SYS_DESC(SYS_ID_DFR0_EL1), - .access = access_id_reg, - .get_user = get_id_reg, - .set_user = set_id_dfr0_el1, - .visibility = aa32_id_visibility, - .reset = read_sanitised_id_dfr0_el1, - .val = GENMASK(31, 0), }, + _AA32_ID_SANITISED_W(ID_DFR0_EL1, set_id_dfr0_el1, + read_sanitised_id_dfr0_el1, GENMASK(31, 0)), ID_HIDDEN(ID_AFR0_EL1), AA32_ID_SANITISED(ID_MMFR0_EL1), AA32_ID_SANITISED(ID_MMFR1_EL1), @@ -2038,12 +2036,8 @@ static const struct sys_reg_desc sys_reg_descs[] = { /* AArch64 ID registers */ /* CRm=4 */ - { SYS_DESC(SYS_ID_AA64PFR0_EL1), - .access = access_id_reg, - .get_user = get_id_reg, - .set_user = set_id_reg, - .reset = read_sanitised_id_aa64pfr0_el1, - .val = ~ID_AA64PFR0_EL1_AMU_MASK, }, + _ID_SANITISED_W(ID_AA64PFR0_EL1, set_id_reg, + read_sanitised_id_aa64pfr0_el1, ~ID_AA64PFR0_EL1_AMU_MASK), ID_SANITISED(ID_AA64PFR1_EL1), ID_UNALLOCATED(4,2), ID_UNALLOCATED(4,3), @@ -2053,12 +2047,8 @@ static const struct sys_reg_desc sys_reg_descs[] = { ID_UNALLOCATED(4,7), /* CRm=5 */ - { SYS_DESC(SYS_ID_AA64DFR0_EL1), - .access = access_id_reg, - .get_user = get_id_reg, - .set_user = set_id_aa64dfr0_el1, - .reset = read_sanitised_id_aa64dfr0_el1, - .val = ~(ID_AA64DFR0_EL1_PMSVer_MASK | ID_AA64DFR0_EL1_RES0_MASK), }, + _ID_SANITISED_W(ID_AA64DFR0_EL1, set_id_aa64dfr0_el1, read_sanitised_id_aa64dfr0_el1, + ~(ID_AA64DFR0_EL1_PMSVer_MASK | ID_AA64DFR0_EL1_RES0_MASK)), ID_SANITISED(ID_AA64DFR1_EL1), ID_UNALLOCATED(5,2), ID_UNALLOCATED(5,3),