From patchwork Thu Aug 31 17:44:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 13371760 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5E99DC83F35 for ; Thu, 31 Aug 2023 17:46:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=+jBTuCbEq41/nofia8bpvfQvg9Za55/VnyANBl1hmK8=; b=TFnw6ncKcGQ+ZWMoHynNOMnKF6 WlSeulHPfoXp0pfo8QB+X1Sgcv6rYRTc5E27SP4fohJEfojKZbYZjAAQ7hTm16GzhR7ZZ5esyxpOp Dl3nbdq+ulmgdjV2kUIwmlPGbw6+1TncBNLcelfjb2IwSRUPHJAjq3JOorv9Vud5BtvQt+4hwDn1g V5q0gAvAba7ii0jQR6o+3g+FfTz7r+uS10M0H3/wnh1VM+vcLNTdQc5xGnvQLzipcbJOB0o3IYXp9 uHLGfdWI2705VkGpEap/2TCrSE0L7cXaKRKHIba6hT/UrnNf5CkHFnAm19VMevLw7K00iJfqb7aF4 s6eUDBpw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qblkP-00FemY-0d; Thu, 31 Aug 2023 17:46:25 +0000 Received: from mail-yw1-x114a.google.com ([2607:f8b0:4864:20::114a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qblk5-00FefU-39 for linux-arm-kernel@lists.infradead.org; Thu, 31 Aug 2023 17:46:07 +0000 Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-58d37b541a2so13762417b3.2 for ; Thu, 31 Aug 2023 10:46:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1693503960; x=1694108760; darn=lists.infradead.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=ByI1wEibb2VTlOST1QE2nymSPLoO1tZHs3WuW7YknC4=; b=PuL+/YtOE2ZMBDXXQ3b1/CQ4Z/AtcCX4n1jg6Ux9TYndP4y52dh6uLlPZJAxPMMXXk 3uQJAtU2bqqQepigvQ5+Xi9drhDb/NoZFoaD7Wt03ra4iXYqYeU1+RzVqGn7J0R1jiJA RXDavKwzfDmijdunPNxaIuFe6QccVn1mXt7/bschkvxnD8jTAQnEhS2gi45fkSSQYDjc romfxlj/xvoXLeuY7mQZZdpt6Xwqw6qvmAsi2IREnVf3E48glil6+bI4OyEBSLyRvzkB khDfs8V+/X+WhhAvhNYiYMk3ZLh8h9E2xiAWZbEoc0w4wKIo8KOdkXF2GD4gsQaqrvfd vHLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1693503960; x=1694108760; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=ByI1wEibb2VTlOST1QE2nymSPLoO1tZHs3WuW7YknC4=; b=k/FNRGRnx6D1M6gOQ8a8+B0BZ5QniiuJtWjX33M+KK1yUbwvZGG6WXnP1TCTPigfOT UiHzH/gypnQvmNI6zI15UZm2+IjLGqIiNWhSB9GSUHXzYV9rl65w3hmUBvMdf/GEIdXZ A0To46G7f00LasvJWh8XOudFcHplqZucr48r2IvIe6VWCP8Cztd76TlaVapDqXfQ6fvk ddUJh55CMVc9S6LRwHAjN7QHRWf0+KRXmAhpHRiKIRK8RcJBjbI8POkq83PkNlZ3lCJ7 cuIupynGFmHLmztCr43nN6GJp37Fah19ZxYCah5Xe40EmwZhNNpL9gYQOk3NyNrrrtop gQYA== X-Gm-Message-State: AOJu0YxjfmjB3dqucZvvn2p5knAzvKeBHfJ0m7uqk+MwmlhScbmic+b8 VgmhXoA+VaXgXc7HT4596VAtdx2pE0XS X-Google-Smtp-Source: AGHT+IETeP/TvPNLQEuYy1USk5YI0K7POPLA/zLoU/1XNZBN0JFR3w9Gk0WHW9caWehCDRFFCCFE2F0gY1LX X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:1a0a:7338:4a5a:5f83]) (user=mshavit job=sendgmr) by 2002:a81:eb0a:0:b0:576:8cb6:62a9 with SMTP id n10-20020a81eb0a000000b005768cb662a9mr2924ywm.6.1693503960746; Thu, 31 Aug 2023 10:46:00 -0700 (PDT) Date: Fri, 1 Sep 2023 01:44:32 +0800 In-Reply-To: <20230831174536.103472-1-mshavit@google.com> Mime-Version: 1.0 References: <20230831174536.103472-1-mshavit@google.com> X-Mailer: git-send-email 2.42.0.283.g2d96d420d3-goog Message-ID: <20230901014413.v7.3.I875254464d044a8ce8b3a2ad6beb655a4a006456@changeid> Subject: [PATCH v7 3/9] iommu/arm-smmu-v3: Encapsulate ctx_desc_cfg init in alloc_cd_tables From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, jean-philippe@linaro.org, jgg@nvidia.com, nicolinc@nvidia.com, Michael Shavit , Jason Gunthorpe , Joerg Roedel , Kevin Tian , "Kirill A. Shutemov" , Lu Baolu , Mark Brown , Yicong Yang X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230831_104606_010018_C3DFAB6A X-CRM114-Status: GOOD ( 12.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is slighlty cleaner: arm_smmu_ctx_desc_cfg is initialized in a single function instead of having pieces set ahead-of time by its caller. Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen Signed-off-by: Michael Shavit --- (no changes since v1) drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 5d1977027d2c4..5bb13fadb41ad 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1132,7 +1132,8 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, return 0; } -static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain) +static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain, + struct arm_smmu_master *master) { int ret; size_t l1size; @@ -1140,6 +1141,7 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain) struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; + cdcfg->s1cdmax = master->ssid_bits; max_contexts = 1 << cdcfg->s1cdmax; if (!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB) || @@ -2105,7 +2107,6 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, int ret; u32 asid; struct arm_smmu_device *smmu = smmu_domain->smmu; - struct arm_smmu_ctx_desc_cfg *cd_table = &smmu_domain->cd_table; struct arm_smmu_ctx_desc *cd = &smmu_domain->cd; typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr = &pgtbl_cfg->arm_lpae_s1_cfg.tcr; @@ -2118,11 +2119,9 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (ret) goto out_unlock; - cd_table->s1cdmax = master->ssid_bits; - smmu_domain->stall_enabled = master->stall_enabled; - ret = arm_smmu_alloc_cd_tables(smmu_domain); + ret = arm_smmu_alloc_cd_tables(smmu_domain, master); if (ret) goto out_free_asid;