diff mbox series

iio: adc: imx8qxp: Fix address for command buffer registers

Message ID 20230904220204.23841-1-embed3d@gmail.com (mailing list archive)
State New, archived
Headers show
Series iio: adc: imx8qxp: Fix address for command buffer registers | expand

Commit Message

Philipp Rossak Sept. 4, 2023, 10:02 p.m. UTC
The ADC Command Buffer Register high and low are currently pointing to
the wrong address and makes it impossible to perform correct
ADC measurements over all channels.

According to the datasheet of the imx8qxp the ADC_CMDL register starts
at address 0x100 and the ADC_CMDH register starts at address 0x104.

This bug seems to be in the kernel since the introduction of this
driver.

This can be observed by checking all raw voltages of the adc and they
are all nearly identical:

cat /sys/bus/iio/devices/iio\:device0/in_voltage*_raw
3498
3494
3491
3491
3489
3490
3490
3490

Fixes: 1e23dcaa1a9fa ("iio: imx8qxp-adc: Add driver support for NXP IMX8QXP ADC")

Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
 drivers/iio/adc/imx8qxp-adc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Bough Chen Sept. 5, 2023, 2:01 a.m. UTC | #1
> -----Original Message-----
> From: Philipp Rossak <embed3d@gmail.com>
> Sent: 2023年9月5日 6:02
> To: Cai Huoqing <cai.huoqing@linux.dev>; Bough Chen <haibo.chen@nxp.com>;
> Jonathan Cameron <jic23@kernel.org>; Lars-Peter Clausen <lars@metafoo.de>;
> Shawn Guo <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>;
> Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> <festevam@gmail.com>; dl-linux-imx <linux-imx@nxp.com>
> Cc: linux-iio@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org; Philipp Rossak <embed3d@gmail.com>
> Subject: [PATCH] iio: adc: imx8qxp: Fix address for command buffer registers
> 
> The ADC Command Buffer Register high and low are currently pointing to the
> wrong address and makes it impossible to perform correct ADC measurements
> over all channels.
> 
> According to the datasheet of the imx8qxp the ADC_CMDL register starts at
> address 0x100 and the ADC_CMDH register starts at address 0x104.
> 
> This bug seems to be in the kernel since the introduction of this driver.
> 
> This can be observed by checking all raw voltages of the adc and they are all
> nearly identical:
> 
> cat /sys/bus/iio/devices/iio\:device0/in_voltage*_raw
> 3498
> 3494
> 3491
> 3491
> 3489
> 3490
> 3490
> 3490

Oh, really thanks for this catch.

Acked-by: Haibo Chen <haibo.chen@nxp.com>

Best Regards
Haibo Chen
> 
> Fixes: 1e23dcaa1a9fa ("iio: imx8qxp-adc: Add driver support for NXP IMX8QXP
> ADC")
> 
> Signed-off-by: Philipp Rossak <embed3d@gmail.com>
> ---
>  drivers/iio/adc/imx8qxp-adc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/iio/adc/imx8qxp-adc.c b/drivers/iio/adc/imx8qxp-adc.c index
> f5a0fc9e64c5..fff6e5a2d956 100644
> --- a/drivers/iio/adc/imx8qxp-adc.c
> +++ b/drivers/iio/adc/imx8qxp-adc.c
> @@ -38,8 +38,8 @@
>  #define IMX8QXP_ADR_ADC_FCTRL		0x30
>  #define IMX8QXP_ADR_ADC_SWTRIG		0x34
>  #define IMX8QXP_ADR_ADC_TCTRL(tid)	(0xc0 + (tid) * 4)
> -#define IMX8QXP_ADR_ADC_CMDH(cid)	(0x100 + (cid) * 8)
> -#define IMX8QXP_ADR_ADC_CMDL(cid)	(0x104 + (cid) * 8)
> +#define IMX8QXP_ADR_ADC_CMDL(cid)	(0x100 + (cid) * 8)
> +#define IMX8QXP_ADR_ADC_CMDH(cid)	(0x104 + (cid) * 8)
>  #define IMX8QXP_ADR_ADC_RESFIFO		0x300
>  #define IMX8QXP_ADR_ADC_TST		0xffc
> 
> --
> 2.39.2
diff mbox series

Patch

diff --git a/drivers/iio/adc/imx8qxp-adc.c b/drivers/iio/adc/imx8qxp-adc.c
index f5a0fc9e64c5..fff6e5a2d956 100644
--- a/drivers/iio/adc/imx8qxp-adc.c
+++ b/drivers/iio/adc/imx8qxp-adc.c
@@ -38,8 +38,8 @@ 
 #define IMX8QXP_ADR_ADC_FCTRL		0x30
 #define IMX8QXP_ADR_ADC_SWTRIG		0x34
 #define IMX8QXP_ADR_ADC_TCTRL(tid)	(0xc0 + (tid) * 4)
-#define IMX8QXP_ADR_ADC_CMDH(cid)	(0x100 + (cid) * 8)
-#define IMX8QXP_ADR_ADC_CMDL(cid)	(0x104 + (cid) * 8)
+#define IMX8QXP_ADR_ADC_CMDL(cid)	(0x100 + (cid) * 8)
+#define IMX8QXP_ADR_ADC_CMDH(cid)	(0x104 + (cid) * 8)
 #define IMX8QXP_ADR_ADC_RESFIFO		0x300
 #define IMX8QXP_ADR_ADC_TST		0xffc