From patchwork Wed Sep 6 09:41:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Pieralisi X-Patchwork-Id: 13375447 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 73964EB8FAF for ; Wed, 6 Sep 2023 09:42:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LRQ4mrHHnYV1YBwoa7o05dXrZ2bQA4JfgNEmZOCaSDs=; b=pf3itSRw2C/1VH zg6BH5ttpOj4KRh+RlcwgFYBM76cN97Qpn0RSUBGSWhAN3g0jPDM8ik2IwtL52CPVUpU1SBBy3ipg 7eyFs+qt8pSykvTBkpRfpJlwzlQpPsEhftTxTAXy1PxOPuIywTP2vbdFuLL6efUazow2MFDBR0bbC kL1e8e8BEluQ/6bfvO3qo2ODI7GiaX53zT5wSAFz2vXyo/5mdxiKZ1i0B+zk468gvHF49nZx/L2Y3 uQxHx0D7tXVj7Nk0ANTxlRbvC6inUuBuc/N0F/KJeNGWuFufakHu5s7O/Bii/lOfR8iZ+uFy6h3w+ MqPn74y01UFzKlcqX9/A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qdp2t-007y91-2H; Wed, 06 Sep 2023 09:41:59 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qdp2q-007y6P-32 for linux-arm-kernel@lists.infradead.org; Wed, 06 Sep 2023 09:41:58 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 71384CE13C1; Wed, 6 Sep 2023 09:41:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8CD1DC433CC; Wed, 6 Sep 2023 09:41:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1693993310; bh=uvMohTUIVeiywkoIARLtBnL5Gws4wgsW2IQCs1Sn+FU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PXhbeW8TylgrJVIWVzkejuVUN4CAiGALmQGlve6e415+0FfoMICdfFr9IMpJ0J8rk TASjBwhpcefpF0KfzNw5pMSNykSZfRqnxvpaxygvQtdALy/FEOIAjH4JevNbVPyNv8 bLSSaWqU4V+UzELmF2UOYXvqi42IGHUgTlJRnY6b7hKW5yGdoOGzSrQyfTV1y47FZy 1WTq+pLcS/qKFEyKrozmhj3UJbaSKF2n+cfqJQszaVFsThnXLPNvR5KN2kjkJYUG7X gEusb6JcBwt5cjDviwT+WpK33i6trvxaJIBrdSCTMH+vvkOpKcWckVMEC6frbJtWod ms4OqKTGWehvg== From: Lorenzo Pieralisi To: linux-kernel@vger.kernel.org Cc: Lorenzo Pieralisi , Rob Herring , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Mark Rutland , Robin Murphy , Rob Herring , Fang Xiang , Marc Zyngier Subject: [PATCH v2 1/2] dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent property Date: Wed, 6 Sep 2023 11:41:38 +0200 Message-Id: <20230906094139.16032-2-lpieralisi@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230906094139.16032-1-lpieralisi@kernel.org> References: <20230905104721.52199-1-lpieralisi@kernel.org> <20230906094139.16032-1-lpieralisi@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230906_024157_192792_D544E306 X-CRM114-Status: GOOD ( 11.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The GIC v3 specifications allow redistributors and ITSes interconnect ports used to access memory to be wired up in a way that makes the respective initiators/memory observers non-coherent. Add the standard dma-noncoherent property to the GICv3 bindings to allow firmware to describe the redistributors/ITSes components and interconnect ports behaviour in system designs where the redistributors and ITSes are not coherent with the CPU. Signed-off-by: Lorenzo Pieralisi Cc: Rob Herring Reviewed-by: Rob Herring --- .../bindings/interrupt-controller/arm,gic-v3.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml index 39e64c7f6360..c9bc9aad93f1 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml @@ -106,6 +106,12 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 maximum: 4096 + dma-noncoherent: + description: + Present if the GIC redistributors permit programming shareability + and cacheability attributes but are connected to a non-coherent + downstream interconnect. + msi-controller: description: Only present if the Message Based Interrupt functionality is @@ -193,6 +199,12 @@ patternProperties: compatible: const: arm,gic-v3-its + dma-noncoherent: + description: + Present if the GIC ITS permits programming shareability and + cacheability attributes but are connected to a non-coherent + downstream interconnect. + msi-controller: true "#msi-cells":