diff mbox series

[v4,5/5] arm64: dts: imx8mp-phyboard-pollux: Add support for RS232/RS485

Message ID 20230906100857.7916-6-c.tenruh@phytec.de (mailing list archive)
State New, archived
Headers show
Series Update of phyBOARD-Pollux-i.MX8MP | expand

Commit Message

Cem Tenruh Sept. 6, 2023, 10:08 a.m. UTC 
From: Teresa Remmet <t.remmet@phytec.de>

Add UART2 for RS232/RS485 support.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
(Updated the node by not setting the reserved bits(BIT 0 and BIT 3)
and enabled internal pullup for RX and TX.)
Signed-off-by: Yashwanth Varakala <y.varakala@phytec.de>
Signed-off-by: Cem Tenruh <c.tenruh@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
---
Changes in v4:
 - Added my missing "signed-off-by"

Changes in v3:
 - No changes

Changes in v2:
 - Edited commit message
 - Added comment to UART2 node
---
 .../freescale/imx8mp-phyboard-pollux-rdk.dts  | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
index 562d4fee2011..c8640cac3edc 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
@@ -177,6 +177,16 @@  &usb_dwc3_1 {
 	status = "okay";
 };
 
+/* RS232/RS485 */
+&uart2 {
+	assigned-clocks = <&clk IMX8MP_CLK_UART2>;
+	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2>;
+	uart-has-rtscts;
+	status = "okay";
+};
+
 /* SD-Card */
 &usdhc2 {
 	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
@@ -298,6 +308,15 @@  MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12     0x10
 		>;
 	};
 
+	pinctrl_uart2: uart2grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX	0x140
+			MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX	0x140
+			MX8MP_IOMUXC_SAI3_RXC__UART2_DCE_CTS	0x140
+			MX8MP_IOMUXC_SAI3_RXD__UART2_DCE_RTS	0x140
+		>;
+	};
+
 	pinctrl_usdhc2_pins: usdhc2-gpiogrp {
 		fsl,pins = <
 			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12	0x1c4