diff mbox series

arm64: dts: imx8mq-nitrogen: Fix PCA9546 I2C subnodes

Message ID 20230908012739.598908-1-festevam@gmail.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8mq-nitrogen: Fix PCA9546 I2C subnodes | expand

Commit Message

Fabio Estevam Sept. 8, 2023, 1:27 a.m. UTC 
From: Fabio Estevam <festevam@denx.de>

Per i2c-mux-pca954x.yaml, the PCA9546 I2C subnodes should be in the
'i2c@' format.

Change it accordingly to fix the following schema warning:

imx8mm-nitrogen-r2.dtb: i2c-mux@70: Unevaluated properties are not allowed ('i2c3@0' was unexpected)

Signed-off-by: Fabio Estevam <festevam@denx.de>
---
 arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

Comments

Shawn Guo Sept. 25, 2023, 1:51 a.m. UTC | #1 
On Thu, Sep 07, 2023 at 10:27:39PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <festevam@denx.de>
> 
> Per i2c-mux-pca954x.yaml, the PCA9546 I2C subnodes should be in the
> 'i2c@' format.
> 
> Change it accordingly to fix the following schema warning:
> 
> imx8mm-nitrogen-r2.dtb: i2c-mux@70: Unevaluated properties are not allowed ('i2c3@0' was unexpected)
> 
> Signed-off-by: Fabio Estevam <festevam@denx.de>

Applied, thanks!
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts
index 8614c18b5998..767819cce886 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dts
@@ -142,7 +142,7 @@  i2c-mux@70 {
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		i2c1a: i2c1@0 {
+		i2c1a: i2c@0 {
 			reg = <0>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -159,7 +159,7 @@  reg_arm_dram: regulator@60 {
 			};
 		};
 
-		i2c1b: i2c1@1 {
+		i2c1b: i2c@1 {
 			reg = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -176,7 +176,7 @@  reg_dram_1p1v: regulator@60 {
 			};
 		};
 
-		i2c1c: i2c1@2 {
+		i2c1c: i2c@2 {
 			reg = <2>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -193,7 +193,7 @@  reg_soc_gpu_vpu: regulator@60 {
 			};
 		};
 
-		i2c1d: i2c1@3 {
+		i2c1d: i2c@3 {
 			reg = <3>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -222,7 +222,7 @@  pca9546: i2c-mux@70 {
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		i2c4@0 {
+		i2c@0 {
 			reg = <0>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -257,14 +257,14 @@  lt8912_out: endpoint {
 			};
 		};
 
-		ddc_i2c_bus: i2c4@1 {
+		ddc_i2c_bus: i2c@1 {
 			reg = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			clock-frequency = <100000>;
 		};
 
-		i2c4@3 {
+		i2c@3 {
 			reg = <3>;
 			#address-cells = <1>;
 			#size-cells = <0>;