diff mbox series

arm64: dts: imx8x-colibri-iris-v2: Fix pinctrl node names

Message ID 20230909124834.1053390-1-festevam@gmail.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8x-colibri-iris-v2: Fix pinctrl node names | expand

Commit Message

Fabio Estevam Sept. 9, 2023, 12:48 p.m. UTC
From: Fabio Estevam <festevam@denx.de>

Per fsl,scu-pinctrl.yaml, the pinctrl node names should end with 'grp'.

Change them to fix the following schema warning:

imx8qxp-colibri-iris-v2.dtb: pinctrl: 'enable_3v3_vmmc', 'lcd-lvds' do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'
	from schema $id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml#

Signed-off-by: Fabio Estevam <festevam@denx.de>
---
 arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Marcel Ziswiler Sept. 11, 2023, 9:30 a.m. UTC | #1
Hi Fabio

Thanks!

On Sat, 2023-09-09 at 09:48 -0300, Fabio Estevam wrote:
> From: Fabio Estevam <festevam@denx.de>
> 
> Per fsl,scu-pinctrl.yaml, the pinctrl node names should end with 'grp'.
> 
> Change them to fix the following schema warning:
> 
> imx8qxp-colibri-iris-v2.dtb: pinctrl: 'enable_3v3_vmmc', 'lcd-lvds' do not match any of the regexes: 'grp$',
> 'pinctrl-[0-9]+'
>         from schema $id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml#
> 
> Signed-off-by: Fabio Estevam <festevam@denx.de>

Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

> ---
>  arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi b/arch/arm64/boot/dts/freescale/imx8x-
> colibri-iris-v2.dtsi
> index 98202a437040..58ec0b399c4f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi
> @@ -23,11 +23,11 @@ &iomuxc {
>         pinctrl-names = "default";
>         pinctrl-0 = <&pinctrl_lvds_converter &pinctrl_gpio_iris>;
>  
> -       pinctrl_enable_3v3_vmmc: enable_3v3_vmmc {
> +       pinctrl_enable_3v3_vmmc: enable-3v3-vmmc-grp {
>                 fsl,pins = <IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31   0x20>;  /* SODIMM 100 */
>         };
>  
> -       pinctrl_lvds_converter: lcd-lvds {
> +       pinctrl_lvds_converter: lvds-converter-grp {
>                 fsl,pins = <IMX8QXP_FLEXCAN1_TX_LSIO_GPIO1_IO18         0x20>,  /* SODIMM  55 */
>                            /* 6B/8B mode. Select LOW - 8B mode (24bit) */
>                            <IMX8QXP_FLEXCAN1_RX_LSIO_GPIO1_IO17         0x20>,  /* SODIMM  63 */

Cheers

Marcel
Shawn Guo Sept. 25, 2023, 2:03 a.m. UTC | #2
On Sat, Sep 09, 2023 at 09:48:34AM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <festevam@denx.de>
> 
> Per fsl,scu-pinctrl.yaml, the pinctrl node names should end with 'grp'.
> 
> Change them to fix the following schema warning:
> 
> imx8qxp-colibri-iris-v2.dtb: pinctrl: 'enable_3v3_vmmc', 'lcd-lvds' do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'
> 	from schema $id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml#
> 
> Signed-off-by: Fabio Estevam <festevam@denx.de>

Applied, thanks!
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi
index 98202a437040..58ec0b399c4f 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris-v2.dtsi
@@ -23,11 +23,11 @@  &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_lvds_converter &pinctrl_gpio_iris>;
 
-	pinctrl_enable_3v3_vmmc: enable_3v3_vmmc {
+	pinctrl_enable_3v3_vmmc: enable-3v3-vmmc-grp {
 		fsl,pins = <IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31	0x20>;	/* SODIMM 100 */
 	};
 
-	pinctrl_lvds_converter: lcd-lvds {
+	pinctrl_lvds_converter: lvds-converter-grp {
 		fsl,pins = <IMX8QXP_FLEXCAN1_TX_LSIO_GPIO1_IO18		0x20>,	/* SODIMM  55 */
 			   /* 6B/8B mode. Select LOW - 8B mode (24bit) */
 			   <IMX8QXP_FLEXCAN1_RX_LSIO_GPIO1_IO17		0x20>,	/* SODIMM  63 */