| Message ID | 20230911105736.11752-3-shuijing.li@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add mt8188 compatiable for DSI cmd packet control | expand |
Il 11/09/23 12:57, Shuijing Li ha scritto: > For mt8188, add dsi cmdq reg control to send long packets to panel > initialization. MT8188 hardware has been changed to automatically > set the cmdq_size value by default when sending long packets. > In this patch, the cmdq_size value is set manually instead. > Remain consistent with previous IC. > > Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> > --- > Changes in v3: > reorder patch 2/3 and 3/3, and describe more about why mt8188 need this > patch, > per suggestion from the previous thread: > https://lore.kernel.org/lkml/411ddbf95e2c2298b84899065691d478069ec273.camel@mediatek.com/ > Changes in v2: > use mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE_SEL, CMDQ_SIZE_SEL); directly, > per suggestion from the previous thread: > https://lore.kernel.org/lkml/015f4c60-ed77-9e1f-8a6b-cda6e4f6ac93@gmail.com/ > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c > index d8bfc2cce54d..e83705394ada 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -86,6 +86,7 @@ > > #define DSI_CMDQ_SIZE 0x60 > #define CMDQ_SIZE 0x3f > +#define CMDQ_SIZE_SEL BIT(15) > > #define DSI_HSTX_CKL_WC 0x64 > > @@ -178,6 +179,7 @@ struct mtk_dsi_driver_data { > const u32 reg_cmdq_off; > bool has_shadow_ctl; > bool has_size_ctl; > + bool cmdq_long_packet_ctl; > }; > > struct mtk_dsi { > @@ -996,6 +998,8 @@ static void mtk_dsi_cmdq(struct mtk_dsi *dsi, const struct mipi_dsi_msg *msg) > > mtk_dsi_mask(dsi, reg_cmdq_off, cmdq_mask, reg_val); > mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE, cmdq_size); > + if (dsi->driver_data->cmdq_long_packet_ctl) Please add a comment here, like: /* Disable setting cmdq_size automatically for long packets */ after which Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > + mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE_SEL, CMDQ_SIZE_SEL); > } > > static ssize_t mtk_dsi_host_send_cmd(struct mtk_dsi *dsi,
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index d8bfc2cce54d..e83705394ada 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -86,6 +86,7 @@ #define DSI_CMDQ_SIZE 0x60 #define CMDQ_SIZE 0x3f +#define CMDQ_SIZE_SEL BIT(15) #define DSI_HSTX_CKL_WC 0x64 @@ -178,6 +179,7 @@ struct mtk_dsi_driver_data { const u32 reg_cmdq_off; bool has_shadow_ctl; bool has_size_ctl; + bool cmdq_long_packet_ctl; }; struct mtk_dsi { @@ -996,6 +998,8 @@ static void mtk_dsi_cmdq(struct mtk_dsi *dsi, const struct mipi_dsi_msg *msg) mtk_dsi_mask(dsi, reg_cmdq_off, cmdq_mask, reg_val); mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE, cmdq_size); + if (dsi->driver_data->cmdq_long_packet_ctl) + mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE_SEL, CMDQ_SIZE_SEL); } static ssize_t mtk_dsi_host_send_cmd(struct mtk_dsi *dsi,
For mt8188, add dsi cmdq reg control to send long packets to panel initialization. MT8188 hardware has been changed to automatically set the cmdq_size value by default when sending long packets. In this patch, the cmdq_size value is set manually instead. Remain consistent with previous IC. Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> --- Changes in v3: reorder patch 2/3 and 3/3, and describe more about why mt8188 need this patch, per suggestion from the previous thread: https://lore.kernel.org/lkml/411ddbf95e2c2298b84899065691d478069ec273.camel@mediatek.com/ Changes in v2: use mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE_SEL, CMDQ_SIZE_SEL); directly, per suggestion from the previous thread: https://lore.kernel.org/lkml/015f4c60-ed77-9e1f-8a6b-cda6e4f6ac93@gmail.com/ --- drivers/gpu/drm/mediatek/mtk_dsi.c | 4 ++++ 1 file changed, 4 insertions(+)