| Message ID | 20230912045157.177966-11-claudiu.beznea.uj@bp.renesas.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add new Renesas RZ/G3S SoC and RZ/G3S SMARC EVK | expand |
Hi Claudiu, On Tue, Sep 12, 2023 at 6:52 AM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > core->name already contains the clock name thus, there is no > need to check the GET_SHIFT(core->conf) to decide on it. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Thanks for your patch! > --- a/drivers/clk/renesas/rzg2l-cpg.c > +++ b/drivers/clk/renesas/rzg2l-cpg.c > @@ -266,7 +266,7 @@ rzg2l_cpg_sd_mux_clk_register(const struct cpg_core_clk *core, > clk_hw_data->priv = priv; > clk_hw_data->conf = core->conf; > > - init.name = GET_SHIFT(core->conf) ? "sd1" : "sd0"; > + init.name = core->name; Note that this does change the case of the names (e.g. "SD0" => "sd0"). I guess no one cares... > init.ops = &rzg2l_cpg_sd_clk_mux_ops; > init.flags = 0; > init.num_parents = core->num_parents; Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On 14.09.2023 16:04, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Tue, Sep 12, 2023 at 6:52 AM Claudiu <claudiu.beznea@tuxon.dev> wrote: >> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >> >> core->name already contains the clock name thus, there is no >> need to check the GET_SHIFT(core->conf) to decide on it. >> >> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Thanks for your patch! > >> --- a/drivers/clk/renesas/rzg2l-cpg.c >> +++ b/drivers/clk/renesas/rzg2l-cpg.c >> @@ -266,7 +266,7 @@ rzg2l_cpg_sd_mux_clk_register(const struct cpg_core_clk *core, >> clk_hw_data->priv = priv; >> clk_hw_data->conf = core->conf; >> >> - init.name = GET_SHIFT(core->conf) ? "sd1" : "sd0"; >> + init.name = core->name; > > Note that this does change the case of the names (e.g. "SD0" => "sd0"). > I guess no one cares... As of my experiments and investigation we should be good with it. > >> init.ops = &rzg2l_cpg_sd_clk_mux_ops; >> init.flags = 0; >> init.num_parents = core->num_parents; > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > > Gr{oetje,eeting}s, > > Geert >
On Fri, Sep 15, 2023 at 7:47 AM claudiu beznea <claudiu.beznea@tuxon.dev> wrote: > On 14.09.2023 16:04, Geert Uytterhoeven wrote: > > On Tue, Sep 12, 2023 at 6:52 AM Claudiu <claudiu.beznea@tuxon.dev> wrote: > >> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > >> > >> core->name already contains the clock name thus, there is no > >> need to check the GET_SHIFT(core->conf) to decide on it. > >> > >> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > > > Thanks for your patch! > > > >> --- a/drivers/clk/renesas/rzg2l-cpg.c > >> +++ b/drivers/clk/renesas/rzg2l-cpg.c > >> @@ -266,7 +266,7 @@ rzg2l_cpg_sd_mux_clk_register(const struct cpg_core_clk *core, > >> clk_hw_data->priv = priv; > >> clk_hw_data->conf = core->conf; > >> > >> - init.name = GET_SHIFT(core->conf) ? "sd1" : "sd0"; > >> + init.name = core->name; > > > > Note that this does change the case of the names (e.g. "SD0" => "sd0"). > > I guess no one cares... > > As of my experiments and investigation we should be good with it. Thx, will queue in renesas-clk-for-v6.7. Gr{oetje,eeting}s, Geert
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index b391c9548421..44226682db2c 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -266,7 +266,7 @@ rzg2l_cpg_sd_mux_clk_register(const struct cpg_core_clk *core, clk_hw_data->priv = priv; clk_hw_data->conf = core->conf; - init.name = GET_SHIFT(core->conf) ? "sd1" : "sd0"; + init.name = core->name; init.ops = &rzg2l_cpg_sd_clk_mux_ops; init.flags = 0; init.num_parents = core->num_parents;