From patchwork Fri Sep 15 13:17:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 13387064 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 74F43EE6457 for ; Fri, 15 Sep 2023 13:21:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: References:Mime-Version:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=PN6UkjcedkAbb7+L70DohuAd+PDXQ5JhEQir+v0aOUQ=; b=NxL2UtFTbqt80Lc/snpPd/IoKD VEQNRuj0OlqgdTcwow9E8Wx4GU33fEDOW5H6xdfw1Rf4YKUOgFhXxoju79et7AGQrcMMo1OqQZfvU Rc55PoQEkv0m9iZHvA6A9aivZolmKsy6S+9tQv0AHVhJUOxzRtz+B6QPTKl7ZuAvbEqvd+kpQ42en t/iLcO+90lI3oPXOYuuwxBw7VBmlwCqVPIWXBWjEARU4QvqCXykAkOj+5VSPAfptLAQATrXzP1w0b S4/S1atI1OUtv4/wSIpbR1vGFqSONDU4JQYv6BJkm12mhgkUvY9QfFyKzxjatiYKHs+hZBL5qM4g2 LF3hdxgA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qh8l9-00Ancs-1v; Fri, 15 Sep 2023 13:21:23 +0000 Received: from mail-yw1-x114a.google.com ([2607:f8b0:4864:20::114a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qh8l2-00AnYf-2H for linux-arm-kernel@lists.infradead.org; Fri, 15 Sep 2023 13:21:18 +0000 Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-59285f1e267so59504407b3.0 for ; Fri, 15 Sep 2023 06:21:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1694784075; x=1695388875; darn=lists.infradead.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=rk7ktlAtF0nCHbLqPotJ0gZV9JuU0iwAIccoyoIY0ho=; b=aanPFh5MJDHsLlad4egw/cViX0djHj5XO0AdxUVvdFFec5ZVjw8bp2frIUqJXMTajW hxntXlz3kMBhHVK2NFr12okyel9c58eeAY5osi4W6NVpMUIlZMbqcDPzaTK2xAfr1ga5 kSR3CNUcP1TZmmeacsXjkpAgNc04BNn2hWj+qWl2nGL6AjWRQeC4G5KQm80RcmfPnvl4 3gNTihtpW13d+VwlcNUg1xmJV3FjVb10ypKD63lA8zVoKikXy+TAK5+7r6+WMmXrqjTo P4yo1g7taT9olBtwj6Xjmg2WrzPf1jpEcfSDu9u1PFGKSZZdqi6eESjKa/0aHmXABu9m xvrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1694784075; x=1695388875; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=rk7ktlAtF0nCHbLqPotJ0gZV9JuU0iwAIccoyoIY0ho=; b=n06cdcfvNqDyenXk3MtGgfId4C2hV1lGSrg4JQm8N6WsnIUR0qmNsMjMYo5GrACroH CRVnU+eF5zmKJDKjdmdh6bniihT/xHBaJK7zy5V/Cb93B5EwYxKDtbMwV8NNKBjqIMnT bgY8s5eF6TBZXZVrAvC6WvNdYWzEIA622Vy7DiRHtul61RJ6uboaOM9zsegLTWVmZ8o5 k7ruAO0FWHcL5NdpHwBnkJEt4BSoOg6Hr/lB3ucib8mtmJTUjSC0iTBYbdEDsC6c+Wk7 u0YRH68phGSVZN4SCIYPkV05WvXgAg8Wrs8lCNdKaLQPWzEj5e1u8QbWfVDPu8SPaQ7S xNeA== X-Gm-Message-State: AOJu0YwibwdJm+R+vN80KWZm4F/oSVwl07dAVJRuTIdAuqmz6mC+MH/H 89dvyISBgMQyj7TUNsPj40FBc7vM7zXW X-Google-Smtp-Source: AGHT+IEsuqKToSpy4ph0FwC6OFkGvqD7Y83L8+qnfS5gxUrdw7ksGLZPDiZXY/SFKnIwhMvxpamfdcWR4Dzk X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:47bc:d53f:1c50:a3f2]) (user=mshavit job=sendgmr) by 2002:a05:690c:2c07:b0:595:7304:68e5 with SMTP id eo7-20020a05690c2c0700b00595730468e5mr131795ywb.0.1694784075473; Fri, 15 Sep 2023 06:21:15 -0700 (PDT) Date: Fri, 15 Sep 2023 21:17:35 +0800 In-Reply-To: <20230915132051.2646055-1-mshavit@google.com> Mime-Version: 1.0 References: <20230915132051.2646055-1-mshavit@google.com> X-Mailer: git-send-email 2.42.0.459.ge4e396fd5e-goog Message-ID: <20230915211705.v8.4.I5aa89c849228794a64146cfe86df21fb71629384@changeid> Subject: [PATCH v8 4/9] iommu/arm-smmu-v3: move stall_enabled to the cd table From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, robin.murphy@arm.com, will@kernel.org, Michael Shavit , Alistair Popple , Dawei Li , Jacob Pan , Jason Gunthorpe , Joerg Roedel , Kevin Tian , "Kirill A. Shutemov" , Lu Baolu , Tomas Krcka X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230915_062116_742278_2607D556 X-CRM114-Status: GOOD ( 18.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org A domain can be attached to multiple masters with different master->stall_enabled values. The stall bit of a CD entry should follow master->stall_enabled and has an inverse relationship with the STE.S1STALLD bit. The stall_enabled bit does not depend on any property of the domain, so move it out of the arm_smmu_domain struct. Move it to the CD table struct so that it can fully describe how CD entries should be written to it. Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen Signed-off-by: Michael Shavit --- (no changes since v5) Changes in v5: - Reword commit Changes in v2: - Use a bitfield instead of a bool for stall_enabled drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 ++++---- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 3 ++- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index a9649eaeed8dc..0b06b58dce6ba 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1114,7 +1114,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid) | CTXDESC_CD_0_V; - if (smmu_domain->stall_enabled) + if (smmu_domain->cd_table.stall_enabled) val |= CTXDESC_CD_0_S; } @@ -1141,6 +1141,7 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain, struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table; + cdcfg->stall_enabled = master->stall_enabled; cdcfg->s1cdmax = master->ssid_bits; max_contexts = 1 << cdcfg->s1cdmax; @@ -2101,8 +2102,6 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (ret) goto out_unlock; - smmu_domain->stall_enabled = master->stall_enabled; - ret = arm_smmu_alloc_cd_tables(smmu_domain, master); if (ret) goto out_free_asid; @@ -2443,7 +2442,8 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) ret = -EINVAL; goto out_unlock; } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && - smmu_domain->stall_enabled != master->stall_enabled) { + smmu_domain->cd_table.stall_enabled != + master->stall_enabled) { ret = -EINVAL; goto out_unlock; } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index def1de62a59c6..287bef2d16aae 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -598,6 +598,8 @@ struct arm_smmu_ctx_desc_cfg { u8 s1fmt; /* log2 of the maximum number of CDs supported by this table */ u8 s1cdmax; + /* Whether CD entries in this table have the stall bit set. */ + u8 stall_enabled:1; }; struct arm_smmu_s2_cfg { @@ -715,7 +717,6 @@ struct arm_smmu_domain { struct mutex init_mutex; /* Protects smmu pointer */ struct io_pgtable_ops *pgtbl_ops; - bool stall_enabled; atomic_t nr_ats_masters; enum arm_smmu_domain_stage stage;