From patchwork Wed Sep 20 09:41:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhavya Kapoor X-Patchwork-Id: 13392435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E4F5FCE79AC for ; Wed, 20 Sep 2023 09:42:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=MFF+AnUWl+/VmrbGAF9/0AJ4TwzsfIrQeO+wUP6xsn4=; b=ptom2mzqCAjxxJ jQjkeipavZ0IU/Eu6U2eOFmARI0I6xr0dQgvekp2w3Ook0cEpLWWJMv6avVZKI3bpVRnrhbWkmReg 1kAW8Dm3sQDsbxPDEx8Fj+Vdie4wwYuJ0g3rxOqkCqySRwnDUK1DhaeL2oApEL+dBiaLh9XP6IUjp 5kTY7LMJWtU3uIkPQ8lOghbulfYyFVgfaXHAHxN1E7un+C6Vk5v7xS9dge/eg/UUCR5Kb5AOl42qG inng227GKSsXM9Tsv6ImEM5SQDA8baqQPAjeIHEuJQsPRtFAizo5tCcyyiTTv0IcpJrqR6G3cizCA K5W35UhJJak9QioedFPg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qitiL-002UXP-15; Wed, 20 Sep 2023 09:41:45 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qitiH-002UWD-2P for linux-arm-kernel@lists.infradead.org; Wed, 20 Sep 2023 09:41:43 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 38K9fWQW080462; Wed, 20 Sep 2023 04:41:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1695202892; bh=9fp9OF36S/XXnEBcCGrs7kEJkJhySv6EG42Vubf+KlY=; h=From:To:CC:Subject:Date; b=Dq2FT2DUs9AvxYXJSA3W4TKU3rS26jdlBR7u8iN3bkM4P6j3/1rdxHAgYN69Op7yG 0kkaEDKNYU54F6Ig11sjqXh0+UmXXG/eyNkxL0BiBIYYWNoVZ9b0azluCbJZ7u4w0w YH4dg3mn/2gud4R2DcgdPm+q8A/wBvUKdyqAKvVM= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 38K9fWuR027160 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 20 Sep 2023 04:41:32 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 20 Sep 2023 04:41:31 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 20 Sep 2023 04:41:31 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 38K9fUSj021166; Wed, 20 Sep 2023 04:41:31 -0500 From: Bhavya Kapoor To: , CC: , , , , , , , , , , Subject: [PATCH v3] arm64: dts: ti: k3-j721s2-main: Enable support for SDR104 speed mode Date: Wed, 20 Sep 2023 15:11:30 +0530 Message-ID: <20230920094130.20279-1-b-kapoor@ti.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230920_024141_953269_4E7F4924 X-CRM114-Status: GOOD ( 13.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org According to TRM for J721S2, SDR104 speed mode is supported by the SoC but its capabilities were masked in device tree. Remove sdhci-caps-mask to enable support for SDR104 speed mode for SD card in J721S2 SoC. Also add itap delay select value for DDR50 High Speed Mode. [+] Refer to : section 12.3.6.1.1 MMCSD Features, in J721S2 TRM - https://www.ti.com/lit/zip/spruj28 Fixes: b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC") Signed-off-by: Bhavya Kapoor Reviewed-by: Udit Kumar --- Changelog v2->v3: - Add Itap Delay Select value for DDR50 SD High Speed Mode Link to v2 patch : https://lore.kernel.org/all/20230412121415.860447-1-b-kapoor@ti.com/ arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index 084f8f5b6699..a5ab301b14f1 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -766,11 +766,10 @@ main_sdhci1: mmc@4fb0000 { ti,itap-del-sel-sd-hs = <0x0>; ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr25 = <0x0>; + ti,itap-del-sel-ddr50 = <0x2>; ti,clkbuf-sel = <0x7>; ti,trm-icp = <0x8>; dma-coherent; - /* Masking support for SDR104 capability */ - sdhci-caps-mask = <0x00000003 0x00000000>; status = "disabled"; };